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5033f43c66
Finally, move the 's3c24xx' directory to 'samsung' Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
106 lines
3.2 KiB
C
106 lines
3.2 KiB
C
/* sound/soc/samsung/s3c-i2s-v2.h
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*
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* ALSA Soc Audio Layer - S3C_I2SV2 I2S driver
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*
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* Copyright (c) 2007 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/* This code is the core support for the I2S block found in a number of
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* Samsung SoC devices which is unofficially named I2S-V2. Currently the
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* S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S
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* channels via configurable GPIO.
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*/
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#ifndef __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H
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#define __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H __FILE__
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#define S3C_I2SV2_DIV_BCLK (1)
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#define S3C_I2SV2_DIV_RCLK (2)
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#define S3C_I2SV2_DIV_PRESCALER (3)
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#define S3C_I2SV2_CLKSRC_PCLK 0
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#define S3C_I2SV2_CLKSRC_AUDIOBUS 1
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#define S3C_I2SV2_CLKSRC_CDCLK 2
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/* Set this flag for I2S controllers that have the bit IISMOD[12]
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* bridge/break RCLK signal and external Xi2sCDCLK pin.
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*/
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#define S3C_FEATURE_CDCLKCON (1 << 0)
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/**
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* struct s3c_i2sv2_info - S3C I2S-V2 information
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* @dev: The parent device passed to use from the probe.
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* @regs: The pointer to the device registe block.
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* @feature: Set of bit-flags indicating features of the controller.
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* @master: True if the I2S core is the I2S bit clock master.
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* @dma_playback: DMA information for playback channel.
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* @dma_capture: DMA information for capture channel.
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* @suspend_iismod: PM save for the IISMOD register.
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* @suspend_iiscon: PM save for the IISCON register.
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* @suspend_iispsr: PM save for the IISPSR register.
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*
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* This is the private codec state for the hardware associated with an
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* I2S channel such as the register mappings and clock sources.
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*/
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struct s3c_i2sv2_info {
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struct device *dev;
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void __iomem *regs;
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u32 feature;
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struct clk *iis_pclk;
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struct clk *iis_cclk;
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unsigned char master;
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struct s3c_dma_params *dma_playback;
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struct s3c_dma_params *dma_capture;
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u32 suspend_iismod;
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u32 suspend_iiscon;
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u32 suspend_iispsr;
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unsigned long base;
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};
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extern struct clk *s3c_i2sv2_get_clock(struct snd_soc_dai *cpu_dai);
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struct s3c_i2sv2_rate_calc {
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unsigned int clk_div; /* for prescaler */
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unsigned int fs_div; /* for root frame clock */
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};
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extern int s3c_i2sv2_iis_calc_rate(struct s3c_i2sv2_rate_calc *info,
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unsigned int *fstab,
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unsigned int rate, struct clk *clk);
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/**
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* s3c_i2sv2_probe - probe for i2s device helper
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* @dai: The ASoC DAI structure supplied to the original probe.
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* @i2s: Our local i2s structure to fill in.
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* @base: The base address for the registers.
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*/
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extern int s3c_i2sv2_probe(struct snd_soc_dai *dai,
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struct s3c_i2sv2_info *i2s,
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unsigned long base);
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/**
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* s3c_i2sv2_register_dai - register dai with soc core
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* @dev: DAI device
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* @id: DAI ID
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* @drv: The driver structure to register
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*
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* Fill in any missing fields and then register the given dai with the
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* soc core.
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*/
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extern int s3c_i2sv2_register_dai(struct device *dev, int id,
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struct snd_soc_dai_driver *drv);
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#endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */
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