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![Greg Kroah-Hartman](/assets/img/avatar_default.png)
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
440 lines
9.3 KiB
C
440 lines
9.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* linux/arch/arm/mach-ebsa110/isamem.c
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*
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* Copyright (C) 2001 Russell King
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*
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* Perform "ISA" memory and IO accesses. The EBSA110 has some "peculiarities"
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* in the way it handles accesses to odd IO ports on 16-bit devices. These
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* devices have their D0-D15 lines connected to the processors D0-D15 lines.
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* Since they expect all byte IO operations to be performed on D0-D7, and the
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* StrongARM expects to transfer the byte to these odd addresses on D8-D15,
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* we must use a trick to get the required behaviour.
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*
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* The trick employed here is to use long word stores to odd address -1. The
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* glue logic picks this up as a "trick" access, and asserts the LSB of the
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* peripherals address bus, thereby accessing the odd IO port. Meanwhile, the
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* StrongARM transfers its data on D0-D7 as expected.
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*
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* Things get more interesting on the pass-1 EBSA110 - the PCMCIA controller
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* wiring was screwed in such a way that it had limited memory space access.
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* Luckily, the work-around for this is not too horrible. See
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* __isamem_convert_addr for the details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/page.h>
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static void __iomem *__isamem_convert_addr(const volatile void __iomem *addr)
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{
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u32 ret, a = (u32 __force) addr;
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/*
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* The PCMCIA controller is wired up as follows:
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* +---------+---------+---------+---------+---------+---------+
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* PCMCIA | 2 2 2 2 | 1 1 1 1 | 1 1 1 1 | 1 1 | | |
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* | 3 2 1 0 | 9 8 7 6 | 5 4 3 2 | 1 0 9 8 | 7 6 5 4 | 3 2 1 0 |
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* +---------+---------+---------+---------+---------+---------+
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* CPU | 2 2 2 2 | 2 1 1 1 | 1 1 1 1 | 1 1 1 | | |
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* | 4 3 2 1 | 0 9 9 8 | 7 6 5 4 | 3 2 0 9 | 8 7 6 5 | 4 3 2 x |
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* +---------+---------+---------+---------+---------+---------+
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*
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* This means that we can access PCMCIA regions as follows:
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* 0x*10000 -> 0x*1ffff
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* 0x*70000 -> 0x*7ffff
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* 0x*90000 -> 0x*9ffff
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* 0x*f0000 -> 0x*fffff
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*/
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ret = (a & 0xf803fe) << 1;
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ret |= (a & 0x03fc00) << 2;
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ret += 0xe8000000;
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if ((a & 0x20000) == (a & 0x40000) >> 1)
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return (void __iomem *)ret;
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BUG();
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return NULL;
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}
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/*
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* read[bwl] and write[bwl]
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*/
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u8 __readb(const volatile void __iomem *addr)
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{
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void __iomem *a = __isamem_convert_addr(addr);
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u32 ret;
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if ((unsigned long)addr & 1)
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ret = __raw_readl(a);
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else
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ret = __raw_readb(a);
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return ret;
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}
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u16 __readw(const volatile void __iomem *addr)
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{
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void __iomem *a = __isamem_convert_addr(addr);
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if ((unsigned long)addr & 1)
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BUG();
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return __raw_readw(a);
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}
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u32 __readl(const volatile void __iomem *addr)
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{
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void __iomem *a = __isamem_convert_addr(addr);
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u32 ret;
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if ((unsigned long)addr & 3)
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BUG();
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ret = __raw_readw(a);
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ret |= __raw_readw(a + 4) << 16;
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return ret;
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}
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EXPORT_SYMBOL(__readb);
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EXPORT_SYMBOL(__readw);
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EXPORT_SYMBOL(__readl);
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void readsw(const volatile void __iomem *addr, void *data, int len)
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{
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void __iomem *a = __isamem_convert_addr(addr);
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BUG_ON((unsigned long)addr & 1);
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__raw_readsw(a, data, len);
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}
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EXPORT_SYMBOL(readsw);
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void readsl(const volatile void __iomem *addr, void *data, int len)
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{
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void __iomem *a = __isamem_convert_addr(addr);
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BUG_ON((unsigned long)addr & 3);
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__raw_readsl(a, data, len);
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}
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EXPORT_SYMBOL(readsl);
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void __writeb(u8 val, volatile void __iomem *addr)
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{
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void __iomem *a = __isamem_convert_addr(addr);
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if ((unsigned long)addr & 1)
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__raw_writel(val, a);
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else
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__raw_writeb(val, a);
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}
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void __writew(u16 val, volatile void __iomem *addr)
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{
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void __iomem *a = __isamem_convert_addr(addr);
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if ((unsigned long)addr & 1)
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BUG();
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__raw_writew(val, a);
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}
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void __writel(u32 val, volatile void __iomem *addr)
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{
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void __iomem *a = __isamem_convert_addr(addr);
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if ((unsigned long)addr & 3)
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BUG();
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__raw_writew(val, a);
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__raw_writew(val >> 16, a + 4);
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}
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EXPORT_SYMBOL(__writeb);
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EXPORT_SYMBOL(__writew);
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EXPORT_SYMBOL(__writel);
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void writesw(volatile void __iomem *addr, const void *data, int len)
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{
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void __iomem *a = __isamem_convert_addr(addr);
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BUG_ON((unsigned long)addr & 1);
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__raw_writesw(a, data, len);
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}
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EXPORT_SYMBOL(writesw);
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void writesl(volatile void __iomem *addr, const void *data, int len)
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{
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void __iomem *a = __isamem_convert_addr(addr);
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BUG_ON((unsigned long)addr & 3);
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__raw_writesl(a, data, len);
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}
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EXPORT_SYMBOL(writesl);
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/*
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* The EBSA110 has a weird "ISA IO" region:
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*
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* Region 0 (addr = 0xf0000000 + io << 2)
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* --------------------------------------------------------
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* Physical region IO region
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* f0000fe0 - f0000ffc 3f8 - 3ff ttyS0
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* f0000e60 - f0000e64 398 - 399
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* f0000de0 - f0000dfc 378 - 37f lp0
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* f0000be0 - f0000bfc 2f8 - 2ff ttyS1
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*
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* Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1))
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* --------------------------------------------------------
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* Physical region IO region
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* f00014f1 a79 pnp write data
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* f00007c0 - f00007c1 3e0 - 3e1 pcmcia
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* f00004f1 279 pnp address
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* f0000440 - f000046c 220 - 236 eth0
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* f0000405 203 pnp read data
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*/
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#define SUPERIO_PORT(p) \
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(((p) >> 3) == (0x3f8 >> 3) || \
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((p) >> 3) == (0x2f8 >> 3) || \
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((p) >> 3) == (0x378 >> 3))
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/*
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* We're addressing an 8 or 16-bit peripheral which tranfers
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* odd addresses on the low ISA byte lane.
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*/
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u8 __inb8(unsigned int port)
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{
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u32 ret;
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/*
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* The SuperIO registers use sane addressing techniques...
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*/
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if (SUPERIO_PORT(port))
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ret = __raw_readb((void __iomem *)ISAIO_BASE + (port << 2));
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else {
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void __iomem *a = (void __iomem *)ISAIO_BASE + ((port & ~1) << 1);
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/*
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* Shame nothing else does
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*/
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if (port & 1)
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ret = __raw_readl(a);
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else
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ret = __raw_readb(a);
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}
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return ret;
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}
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/*
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* We're addressing a 16-bit peripheral which transfers odd
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* addresses on the high ISA byte lane.
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*/
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u8 __inb16(unsigned int port)
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{
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unsigned int offset;
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/*
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* The SuperIO registers use sane addressing techniques...
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*/
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if (SUPERIO_PORT(port))
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offset = port << 2;
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else
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offset = (port & ~1) << 1 | (port & 1);
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return __raw_readb((void __iomem *)ISAIO_BASE + offset);
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}
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u16 __inw(unsigned int port)
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{
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unsigned int offset;
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/*
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* The SuperIO registers use sane addressing techniques...
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*/
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if (SUPERIO_PORT(port))
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offset = port << 2;
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else {
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offset = port << 1;
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BUG_ON(port & 1);
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}
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return __raw_readw((void __iomem *)ISAIO_BASE + offset);
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}
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/*
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* Fake a 32-bit read with two 16-bit reads. Needed for 3c589.
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*/
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u32 __inl(unsigned int port)
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{
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void __iomem *a;
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if (SUPERIO_PORT(port) || port & 3)
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BUG();
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a = (void __iomem *)ISAIO_BASE + ((port & ~1) << 1);
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return __raw_readw(a) | __raw_readw(a + 4) << 16;
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}
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EXPORT_SYMBOL(__inb8);
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EXPORT_SYMBOL(__inb16);
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EXPORT_SYMBOL(__inw);
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EXPORT_SYMBOL(__inl);
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void __outb8(u8 val, unsigned int port)
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{
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/*
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* The SuperIO registers use sane addressing techniques...
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*/
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if (SUPERIO_PORT(port))
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__raw_writeb(val, (void __iomem *)ISAIO_BASE + (port << 2));
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else {
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void __iomem *a = (void __iomem *)ISAIO_BASE + ((port & ~1) << 1);
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/*
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* Shame nothing else does
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*/
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if (port & 1)
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__raw_writel(val, a);
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else
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__raw_writeb(val, a);
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}
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}
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void __outb16(u8 val, unsigned int port)
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{
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unsigned int offset;
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/*
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* The SuperIO registers use sane addressing techniques...
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*/
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if (SUPERIO_PORT(port))
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offset = port << 2;
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else
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offset = (port & ~1) << 1 | (port & 1);
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__raw_writeb(val, (void __iomem *)ISAIO_BASE + offset);
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}
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void __outw(u16 val, unsigned int port)
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{
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unsigned int offset;
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/*
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* The SuperIO registers use sane addressing techniques...
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*/
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if (SUPERIO_PORT(port))
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offset = port << 2;
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else {
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offset = port << 1;
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BUG_ON(port & 1);
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}
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__raw_writew(val, (void __iomem *)ISAIO_BASE + offset);
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}
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void __outl(u32 val, unsigned int port)
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{
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BUG();
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}
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EXPORT_SYMBOL(__outb8);
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EXPORT_SYMBOL(__outb16);
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EXPORT_SYMBOL(__outw);
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EXPORT_SYMBOL(__outl);
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void outsb(unsigned int port, const void *from, int len)
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{
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u32 off;
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if (SUPERIO_PORT(port))
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off = port << 2;
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else {
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off = (port & ~1) << 1;
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if (port & 1)
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BUG();
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}
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__raw_writesb((void __iomem *)ISAIO_BASE + off, from, len);
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}
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void insb(unsigned int port, void *from, int len)
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{
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u32 off;
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if (SUPERIO_PORT(port))
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off = port << 2;
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else {
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off = (port & ~1) << 1;
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if (port & 1)
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BUG();
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}
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__raw_readsb((void __iomem *)ISAIO_BASE + off, from, len);
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}
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EXPORT_SYMBOL(outsb);
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EXPORT_SYMBOL(insb);
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void outsw(unsigned int port, const void *from, int len)
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{
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u32 off;
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if (SUPERIO_PORT(port))
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off = port << 2;
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else {
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off = (port & ~1) << 1;
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if (port & 1)
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BUG();
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}
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__raw_writesw((void __iomem *)ISAIO_BASE + off, from, len);
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}
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void insw(unsigned int port, void *from, int len)
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{
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u32 off;
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if (SUPERIO_PORT(port))
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off = port << 2;
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else {
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off = (port & ~1) << 1;
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if (port & 1)
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BUG();
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}
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__raw_readsw((void __iomem *)ISAIO_BASE + off, from, len);
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}
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EXPORT_SYMBOL(outsw);
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EXPORT_SYMBOL(insw);
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/*
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* We implement these as 16-bit insw/outsw, mainly for
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* 3c589 cards.
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*/
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void outsl(unsigned int port, const void *from, int len)
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{
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u32 off = port << 1;
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if (SUPERIO_PORT(port) || port & 3)
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BUG();
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__raw_writesw((void __iomem *)ISAIO_BASE + off, from, len << 1);
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}
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void insl(unsigned int port, void *from, int len)
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{
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u32 off = port << 1;
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if (SUPERIO_PORT(port) || port & 3)
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BUG();
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__raw_readsw((void __iomem *)ISAIO_BASE + off, from, len << 1);
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}
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EXPORT_SYMBOL(outsl);
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EXPORT_SYMBOL(insl);
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