linux-stable/arch/arm/mach-shmobile/headsmp-apmu.S
Arnd Bergmann 703ef76b8f ARM: shmobile: rcar-gen2: fix non-SMP build
A bugfix for the SMP case broke the build for the UP case:

arch/arm/mach-shmobile/headsmp-apmu.o: In function `shmobile_boot_apmu':
(.text+0x34): undefined reference to `secondary_startup'

The assembler file mixes code that is used for SMP with code
that we also need on a single-CPU build, so I'm leaving it
always enabled in the Makefile, but enclose the SMP code
in an #ifdef.

Fixes: fd45a136ff6 ("ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-11 09:40:12 +02:00

39 lines
1 KiB
ArmAsm

/*
* SMP support for APMU based systems with Cortex A7/A15
*
* Copyright (C) 2014 Renesas Electronics Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
ENTRY(shmobile_init_cntvoff)
/*
* CNTVOFF has to be initialized either from non-secure Hypervisor
* mode or secure Monitor mode with SCR.NS==1. If TrustZone is enabled
* then it should be handled by the secure code
*/
cps #MON_MODE
mrc p15, 0, r1, c1, c1, 0 /* Get Secure Config */
orr r0, r1, #1
mcr p15, 0, r0, c1, c1, 0 /* Set Non Secure bit */
instr_sync
mov r0, #0
mcrr p15, 4, r0, r0, c14 /* CNTVOFF = 0 */
instr_sync
mcr p15, 0, r1, c1, c1, 0 /* Set Secure bit */
instr_sync
cps #SVC_MODE
ret lr
ENDPROC(shmobile_init_cntvoff)
#ifdef CONFIG_SMP
ENTRY(shmobile_boot_apmu)
bl shmobile_init_cntvoff
b secondary_startup
ENDPROC(shmobile_boot_apmu)
#endif