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![Michal Wajdeczko](/assets/img/avatar_default.png)
GuC stores some data in there, which might be stale after a reset. Reinitialize whole ADS in case any part of it was corrupted during previous GuC run. v2: s/reinit/init, update functions descriptions (Tomek/Michal) v3: reset ADS right before fw upload Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: MichaĹ Winiarski <michal.winiarski@intel.com> Cc: Tomasz Lis <tomasz.lis@intel.com> Reviewed-by: Tomasz Lis <tomasz.lis@intel.com> #v2 Reviewed-by: MichaĹ Winiarski <michal.winiarski@intel.com> #v2 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190527183613.17076-5-michal.wajdeczko@intel.com
202 lines
6.3 KiB
C
202 lines
6.3 KiB
C
/*
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* Copyright © 2014-2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "intel_guc_ads.h"
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#include "intel_uc.h"
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#include "i915_drv.h"
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/*
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* The Additional Data Struct (ADS) has pointers for different buffers used by
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* the GuC. One single gem object contains the ADS struct itself (guc_ads), the
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* scheduling policies (guc_policies), a structure describing a collection of
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* register sets (guc_mmio_reg_state) and some extra pages for the GuC to save
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* its internal state for sleep.
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*/
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static void guc_policy_init(struct guc_policy *policy)
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{
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policy->execution_quantum = POLICY_DEFAULT_EXECUTION_QUANTUM_US;
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policy->preemption_time = POLICY_DEFAULT_PREEMPTION_TIME_US;
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policy->fault_time = POLICY_DEFAULT_FAULT_TIME_US;
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policy->policy_flags = 0;
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}
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static void guc_policies_init(struct guc_policies *policies)
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{
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struct guc_policy *policy;
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u32 p, i;
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policies->dpc_promote_time = POLICY_DEFAULT_DPC_PROMOTE_TIME_US;
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policies->max_num_work_items = POLICY_MAX_NUM_WI;
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for (p = 0; p < GUC_CLIENT_PRIORITY_NUM; p++) {
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for (i = 0; i < GUC_MAX_ENGINE_CLASSES; i++) {
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policy = &policies->policy[p][i];
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guc_policy_init(policy);
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}
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}
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policies->is_valid = 1;
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}
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static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num)
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{
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memset(pool, 0, num * sizeof(*pool));
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}
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/*
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* The first 80 dwords of the register state context, containing the
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* execlists and ppgtt registers.
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*/
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#define LR_HW_CONTEXT_SIZE (80 * sizeof(u32))
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/* The ads obj includes the struct itself and buffers passed to GuC */
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struct __guc_ads_blob {
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struct guc_ads ads;
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struct guc_policies policies;
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struct guc_mmio_reg_state reg_state;
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struct guc_gt_system_info system_info;
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struct guc_clients_info clients_info;
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struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
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u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
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} __packed;
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static int __guc_ads_init(struct intel_guc *guc)
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{
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struct drm_i915_private *dev_priv = guc_to_i915(guc);
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struct __guc_ads_blob *blob;
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const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE;
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u32 base;
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u8 engine_class;
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blob = i915_gem_object_pin_map(guc->ads_vma->obj, I915_MAP_WB);
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if (IS_ERR(blob))
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return PTR_ERR(blob);
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/* GuC scheduling policies */
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guc_policies_init(&blob->policies);
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/*
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* GuC expects a per-engine-class context image and size
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* (minus hwsp and ring context). The context image will be
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* used to reinitialize engines after a reset. It must exist
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* and be pinned in the GGTT, so that the address won't change after
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* we have told GuC where to find it. The context size will be used
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* to validate that the LRC base + size fall within allowed GGTT.
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*/
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for (engine_class = 0; engine_class <= MAX_ENGINE_CLASS; ++engine_class) {
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if (engine_class == OTHER_CLASS)
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continue;
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/*
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* TODO: Set context pointer to default state to allow
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* GuC to re-init guilty contexts after internal reset.
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*/
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blob->ads.golden_context_lrca[engine_class] = 0;
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blob->ads.eng_state_size[engine_class] =
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intel_engine_context_size(dev_priv, engine_class) -
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skipped_size;
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}
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/* System info */
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blob->system_info.slice_enabled = hweight8(RUNTIME_INFO(dev_priv)->sseu.slice_mask);
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blob->system_info.rcs_enabled = 1;
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blob->system_info.bcs_enabled = 1;
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blob->system_info.vdbox_enable_mask = VDBOX_MASK(dev_priv);
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blob->system_info.vebox_enable_mask = VEBOX_MASK(dev_priv);
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blob->system_info.vdbox_sfc_support_mask = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
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base = intel_guc_ggtt_offset(guc, guc->ads_vma);
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/* Clients info */
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guc_ct_pool_entries_init(blob->ct_pool, ARRAY_SIZE(blob->ct_pool));
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blob->clients_info.clients_num = 1;
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blob->clients_info.ct_pool_addr = base + ptr_offset(blob, ct_pool);
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blob->clients_info.ct_pool_count = ARRAY_SIZE(blob->ct_pool);
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/* ADS */
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blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
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blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer);
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blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
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blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
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blob->ads.clients_info = base + ptr_offset(blob, clients_info);
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i915_gem_object_unpin_map(guc->ads_vma->obj);
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return 0;
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}
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/**
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* intel_guc_ads_create() - allocates and initializes GuC ADS.
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* @guc: intel_guc struct
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*
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* GuC needs memory block (Additional Data Struct), where it will store
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* some data. Allocate and initialize such memory block for GuC use.
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*/
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int intel_guc_ads_create(struct intel_guc *guc)
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{
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const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
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struct i915_vma *vma;
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int ret;
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GEM_BUG_ON(guc->ads_vma);
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vma = intel_guc_allocate_vma(guc, size);
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if (IS_ERR(vma))
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return PTR_ERR(vma);
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guc->ads_vma = vma;
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ret = __guc_ads_init(guc);
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if (ret)
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goto err_vma;
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return 0;
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err_vma:
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i915_vma_unpin_and_release(&guc->ads_vma, 0);
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return ret;
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}
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void intel_guc_ads_destroy(struct intel_guc *guc)
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{
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i915_vma_unpin_and_release(&guc->ads_vma, 0);
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}
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/**
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* intel_guc_ads_reset() - prepares GuC Additional Data Struct for reuse
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* @guc: intel_guc struct
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*
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* GuC stores some data in ADS, which might be stale after a reset.
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* Reinitialize whole ADS in case any part of it was corrupted during
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* previous GuC run.
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*/
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void intel_guc_ads_reset(struct intel_guc *guc)
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{
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if (!guc->ads_vma)
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return;
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__guc_ads_init(guc);
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}
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