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![Daniele Ceraolo Spurio](/assets/img/avatar_default.png)
Matching the underlying get/put functions. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Imre Deak <imre.deak@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190613232156.34940-8-daniele.ceraolospurio@intel.com
182 lines
4.9 KiB
C
182 lines
4.9 KiB
C
/*
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* Copyright © 2016-2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include <linux/types.h>
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#include "intel_huc.h"
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#include "i915_drv.h"
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void intel_huc_init_early(struct intel_huc *huc)
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{
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struct drm_i915_private *i915 = huc_to_i915(huc);
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intel_huc_fw_init_early(huc);
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if (INTEL_GEN(i915) >= 11) {
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huc->status.reg = GEN11_HUC_KERNEL_LOAD_INFO;
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huc->status.mask = HUC_LOAD_SUCCESSFUL;
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huc->status.value = HUC_LOAD_SUCCESSFUL;
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} else {
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huc->status.reg = HUC_STATUS2;
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huc->status.mask = HUC_FW_VERIFIED;
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huc->status.value = HUC_FW_VERIFIED;
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}
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}
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int intel_huc_init_misc(struct intel_huc *huc)
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{
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struct drm_i915_private *i915 = huc_to_i915(huc);
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intel_uc_fw_fetch(i915, &huc->fw);
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return 0;
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}
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static int intel_huc_rsa_data_create(struct intel_huc *huc)
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{
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struct drm_i915_private *i915 = huc_to_i915(huc);
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struct intel_guc *guc = &i915->guc;
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struct i915_vma *vma;
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void *vaddr;
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/*
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* HuC firmware will sit above GUC_GGTT_TOP and will not map
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* through GTT. Unfortunately, this means GuC cannot perform
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* the HuC auth. as the rsa offset now falls within the GuC
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* inaccessible range. We resort to perma-pinning an additional
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* vma within the accessible range that only contains the rsa
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* signature. The GuC can use this extra pinning to perform
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* the authentication since its GGTT offset will be GuC
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* accessible.
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*/
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vma = intel_guc_allocate_vma(guc, PAGE_SIZE);
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if (IS_ERR(vma))
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return PTR_ERR(vma);
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vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
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if (IS_ERR(vaddr)) {
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i915_vma_unpin_and_release(&vma, 0);
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return PTR_ERR(vaddr);
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}
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huc->rsa_data = vma;
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huc->rsa_data_vaddr = vaddr;
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return 0;
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}
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static void intel_huc_rsa_data_destroy(struct intel_huc *huc)
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{
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i915_vma_unpin_and_release(&huc->rsa_data, I915_VMA_RELEASE_MAP);
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}
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int intel_huc_init(struct intel_huc *huc)
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{
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int err;
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err = intel_huc_rsa_data_create(huc);
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if (err)
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return err;
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return intel_uc_fw_init(&huc->fw);
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}
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void intel_huc_fini(struct intel_huc *huc)
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{
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intel_uc_fw_fini(&huc->fw);
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intel_huc_rsa_data_destroy(huc);
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}
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/**
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* intel_huc_auth() - Authenticate HuC uCode
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* @huc: intel_huc structure
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*
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* Called after HuC and GuC firmware loading during intel_uc_init_hw().
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*
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* This function pins HuC firmware image object into GGTT.
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* Then it invokes GuC action to authenticate passing the offset to RSA
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* signature through intel_guc_auth_huc(). It then waits for 50ms for
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* firmware verification ACK and unpins the object.
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*/
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int intel_huc_auth(struct intel_huc *huc)
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{
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struct drm_i915_private *i915 = huc_to_i915(huc);
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struct intel_guc *guc = &i915->guc;
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int ret;
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if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
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return -ENOEXEC;
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ret = intel_guc_auth_huc(guc,
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intel_guc_ggtt_offset(guc, huc->rsa_data));
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if (ret) {
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DRM_ERROR("HuC: GuC did not ack Auth request %d\n", ret);
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goto fail;
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}
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/* Check authentication status, it should be done by now */
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ret = __intel_wait_for_register(&i915->uncore,
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huc->status.reg,
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huc->status.mask,
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huc->status.value,
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2, 50, NULL);
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if (ret) {
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DRM_ERROR("HuC: Firmware not verified %d\n", ret);
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goto fail;
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}
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return 0;
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fail:
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huc->fw.load_status = INTEL_UC_FIRMWARE_FAIL;
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DRM_ERROR("HuC: Authentication failed %d\n", ret);
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return ret;
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}
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/**
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* intel_huc_check_status() - check HuC status
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* @huc: intel_huc structure
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*
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* This function reads status register to verify if HuC
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* firmware was successfully loaded.
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*
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* Returns: 1 if HuC firmware is loaded and verified,
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* 0 if HuC firmware is not loaded and -ENODEV if HuC
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* is not present on this platform.
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*/
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int intel_huc_check_status(struct intel_huc *huc)
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{
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struct drm_i915_private *dev_priv = huc_to_i915(huc);
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intel_wakeref_t wakeref;
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bool status = false;
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if (!HAS_HUC(dev_priv))
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return -ENODEV;
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with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref)
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status = (I915_READ(huc->status.reg) & huc->status.mask) ==
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huc->status.value;
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return status;
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}
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