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![Fernando Pacheco](/assets/img/avatar_default.png)
Currently we pin the GuC or HuC firmware image just before uploading. Perma-pin during uC initialization instead and use the range reserved at the top of the address space. Moving the firmware resulted in needing to: - use an additional pinning for the rsa signature which will be used during HuC auth as addresses above GUC_GGTT_TOP do not map through GTT. v2: Remove call to set to gtt domain Do not restore fw gtt mapping unconditionally Separate out pin/unpin functions and drop usage of pin/unpin Use uc_fw init/fini functions to bind/unbind fw object v3: Bind is only needed during xfer (Chris) Remove attempts to bind outside of xfer (Chris) Mark fw bind/unbind static Signed-off-by: Fernando Pacheco <fernando.pacheco@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190419230015.18121-4-fernando.pacheco@intel.com
155 lines
4.4 KiB
C
155 lines
4.4 KiB
C
/*
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* Copyright © 2014-2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef _INTEL_UC_FW_H_
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#define _INTEL_UC_FW_H_
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struct drm_printer;
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struct drm_i915_private;
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/* Home of GuC, HuC and DMC firmwares */
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#define INTEL_UC_FIRMWARE_URL "https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/i915"
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enum intel_uc_fw_status {
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INTEL_UC_FIRMWARE_FAIL = -1,
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INTEL_UC_FIRMWARE_NONE = 0,
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INTEL_UC_FIRMWARE_PENDING,
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INTEL_UC_FIRMWARE_SUCCESS
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};
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enum intel_uc_fw_type {
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INTEL_UC_FW_TYPE_GUC,
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INTEL_UC_FW_TYPE_HUC
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};
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/*
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* This structure encapsulates all the data needed during the process
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* of fetching, caching, and loading the firmware image into the uC.
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*/
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struct intel_uc_fw {
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const char *path;
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size_t size;
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struct drm_i915_gem_object *obj;
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enum intel_uc_fw_status fetch_status;
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enum intel_uc_fw_status load_status;
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/*
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* The firmware build process will generate a version header file with major and
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* minor version defined. The versions are built into CSS header of firmware.
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* i915 kernel driver set the minimal firmware version required per platform.
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*/
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u16 major_ver_wanted;
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u16 minor_ver_wanted;
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u16 major_ver_found;
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u16 minor_ver_found;
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enum intel_uc_fw_type type;
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u32 header_size;
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u32 header_offset;
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u32 rsa_size;
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u32 rsa_offset;
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u32 ucode_size;
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u32 ucode_offset;
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};
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static inline
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const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status)
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{
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switch (status) {
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case INTEL_UC_FIRMWARE_FAIL:
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return "FAIL";
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case INTEL_UC_FIRMWARE_NONE:
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return "NONE";
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case INTEL_UC_FIRMWARE_PENDING:
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return "PENDING";
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case INTEL_UC_FIRMWARE_SUCCESS:
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return "SUCCESS";
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}
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return "<invalid>";
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}
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static inline const char *intel_uc_fw_type_repr(enum intel_uc_fw_type type)
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{
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switch (type) {
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case INTEL_UC_FW_TYPE_GUC:
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return "GuC";
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case INTEL_UC_FW_TYPE_HUC:
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return "HuC";
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}
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return "uC";
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}
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static inline
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void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw,
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enum intel_uc_fw_type type)
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{
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uc_fw->path = NULL;
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uc_fw->fetch_status = INTEL_UC_FIRMWARE_NONE;
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uc_fw->load_status = INTEL_UC_FIRMWARE_NONE;
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uc_fw->type = type;
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}
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static inline bool intel_uc_fw_is_selected(struct intel_uc_fw *uc_fw)
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{
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return uc_fw->path != NULL;
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}
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static inline bool intel_uc_fw_is_loaded(struct intel_uc_fw *uc_fw)
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{
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return uc_fw->load_status == INTEL_UC_FIRMWARE_SUCCESS;
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}
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static inline void intel_uc_fw_sanitize(struct intel_uc_fw *uc_fw)
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{
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if (intel_uc_fw_is_loaded(uc_fw))
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uc_fw->load_status = INTEL_UC_FIRMWARE_PENDING;
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}
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/**
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* intel_uc_fw_get_upload_size() - Get size of firmware needed to be uploaded.
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* @uc_fw: uC firmware.
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*
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* Get the size of the firmware and header that will be uploaded to WOPCM.
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*
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* Return: Upload firmware size, or zero on firmware fetch failure.
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*/
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static inline u32 intel_uc_fw_get_upload_size(struct intel_uc_fw *uc_fw)
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{
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if (uc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS)
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return 0;
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return uc_fw->header_size + uc_fw->ucode_size;
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}
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void intel_uc_fw_fetch(struct drm_i915_private *dev_priv,
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struct intel_uc_fw *uc_fw);
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void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw);
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int intel_uc_fw_upload(struct intel_uc_fw *uc_fw,
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int (*xfer)(struct intel_uc_fw *uc_fw));
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int intel_uc_fw_init(struct intel_uc_fw *uc_fw);
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void intel_uc_fw_fini(struct intel_uc_fw *uc_fw);
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u32 intel_uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw);
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void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p);
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#endif
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