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baa51277cf
Provide simulated SMART data to enable the ndctl implementation of SMART
data retrieval and parsing.
The payload is defined here, "Section 4.1 SMART and Health Info
(Function Index 1)":
http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
261 lines
6.2 KiB
C
261 lines
6.2 KiB
C
/*
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* Copyright (c) 2014-2016, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU Lesser General Public License,
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* version 2.1, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT ANY
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* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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* FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for
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* more details.
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*/
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#ifndef __NDCTL_H__
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#define __NDCTL_H__
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#include <linux/types.h>
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struct nd_cmd_smart {
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__u32 status;
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__u8 data[128];
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} __packed;
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#define ND_SMART_HEALTH_VALID (1 << 0)
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#define ND_SMART_TEMP_VALID (1 << 1)
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#define ND_SMART_SPARES_VALID (1 << 2)
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#define ND_SMART_ALARM_VALID (1 << 3)
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#define ND_SMART_USED_VALID (1 << 4)
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#define ND_SMART_SHUTDOWN_VALID (1 << 5)
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#define ND_SMART_VENDOR_VALID (1 << 6)
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#define ND_SMART_TEMP_TRIP (1 << 0)
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#define ND_SMART_SPARE_TRIP (1 << 1)
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#define ND_SMART_NON_CRITICAL_HEALTH (1 << 0)
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#define ND_SMART_CRITICAL_HEALTH (1 << 1)
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#define ND_SMART_FATAL_HEALTH (1 << 2)
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struct nd_smart_payload {
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__u32 flags;
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__u8 reserved0[4];
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__u8 health;
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__u16 temperature;
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__u8 spares;
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__u8 alarm_flags;
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__u8 life_used;
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__u8 shutdown_state;
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__u8 reserved1;
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__u32 vendor_size;
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__u8 vendor_data[108];
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} __packed;
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struct nd_cmd_smart_threshold {
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__u32 status;
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__u8 data[8];
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} __packed;
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struct nd_smart_threshold_payload {
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__u16 alarm_control;
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__u16 temperature;
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__u8 spares;
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__u8 reserved[3];
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} __packed;
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struct nd_cmd_dimm_flags {
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__u32 status;
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__u32 flags;
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} __packed;
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struct nd_cmd_get_config_size {
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__u32 status;
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__u32 config_size;
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__u32 max_xfer;
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} __packed;
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struct nd_cmd_get_config_data_hdr {
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__u32 in_offset;
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__u32 in_length;
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__u32 status;
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__u8 out_buf[0];
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} __packed;
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struct nd_cmd_set_config_hdr {
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__u32 in_offset;
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__u32 in_length;
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__u8 in_buf[0];
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} __packed;
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struct nd_cmd_vendor_hdr {
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__u32 opcode;
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__u32 in_length;
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__u8 in_buf[0];
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} __packed;
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struct nd_cmd_vendor_tail {
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__u32 status;
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__u32 out_length;
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__u8 out_buf[0];
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} __packed;
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struct nd_cmd_ars_cap {
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__u64 address;
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__u64 length;
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__u32 status;
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__u32 max_ars_out;
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__u32 clear_err_unit;
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__u32 reserved;
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} __packed;
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struct nd_cmd_ars_start {
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__u64 address;
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__u64 length;
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__u16 type;
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__u8 flags;
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__u8 reserved[5];
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__u32 status;
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__u32 scrub_time;
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} __packed;
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struct nd_cmd_ars_status {
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__u32 status;
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__u32 out_length;
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__u64 address;
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__u64 length;
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__u64 restart_address;
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__u64 restart_length;
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__u16 type;
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__u16 flags;
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__u32 num_records;
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struct nd_ars_record {
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__u32 handle;
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__u32 reserved;
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__u64 err_address;
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__u64 length;
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} __packed records[0];
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} __packed;
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struct nd_cmd_clear_error {
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__u64 address;
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__u64 length;
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__u32 status;
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__u8 reserved[4];
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__u64 cleared;
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} __packed;
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enum {
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ND_CMD_IMPLEMENTED = 0,
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/* bus commands */
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ND_CMD_ARS_CAP = 1,
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ND_CMD_ARS_START = 2,
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ND_CMD_ARS_STATUS = 3,
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ND_CMD_CLEAR_ERROR = 4,
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/* per-dimm commands */
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ND_CMD_SMART = 1,
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ND_CMD_SMART_THRESHOLD = 2,
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ND_CMD_DIMM_FLAGS = 3,
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ND_CMD_GET_CONFIG_SIZE = 4,
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ND_CMD_GET_CONFIG_DATA = 5,
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ND_CMD_SET_CONFIG_DATA = 6,
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ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7,
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ND_CMD_VENDOR_EFFECT_LOG = 8,
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ND_CMD_VENDOR = 9,
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};
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enum {
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ND_ARS_VOLATILE = 1,
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ND_ARS_PERSISTENT = 2,
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};
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static inline const char *nvdimm_bus_cmd_name(unsigned cmd)
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{
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static const char * const names[] = {
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[ND_CMD_ARS_CAP] = "ars_cap",
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[ND_CMD_ARS_START] = "ars_start",
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[ND_CMD_ARS_STATUS] = "ars_status",
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[ND_CMD_CLEAR_ERROR] = "clear_error",
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};
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if (cmd < ARRAY_SIZE(names) && names[cmd])
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return names[cmd];
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return "unknown";
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}
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static inline const char *nvdimm_cmd_name(unsigned cmd)
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{
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static const char * const names[] = {
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[ND_CMD_SMART] = "smart",
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[ND_CMD_SMART_THRESHOLD] = "smart_thresh",
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[ND_CMD_DIMM_FLAGS] = "flags",
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[ND_CMD_GET_CONFIG_SIZE] = "get_size",
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[ND_CMD_GET_CONFIG_DATA] = "get_data",
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[ND_CMD_SET_CONFIG_DATA] = "set_data",
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[ND_CMD_VENDOR_EFFECT_LOG_SIZE] = "effect_size",
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[ND_CMD_VENDOR_EFFECT_LOG] = "effect_log",
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[ND_CMD_VENDOR] = "vendor",
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};
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if (cmd < ARRAY_SIZE(names) && names[cmd])
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return names[cmd];
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return "unknown";
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}
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#define ND_IOCTL 'N'
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#define ND_IOCTL_SMART _IOWR(ND_IOCTL, ND_CMD_SMART,\
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struct nd_cmd_smart)
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#define ND_IOCTL_SMART_THRESHOLD _IOWR(ND_IOCTL, ND_CMD_SMART_THRESHOLD,\
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struct nd_cmd_smart_threshold)
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#define ND_IOCTL_DIMM_FLAGS _IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\
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struct nd_cmd_dimm_flags)
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#define ND_IOCTL_GET_CONFIG_SIZE _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\
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struct nd_cmd_get_config_size)
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#define ND_IOCTL_GET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\
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struct nd_cmd_get_config_data_hdr)
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#define ND_IOCTL_SET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\
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struct nd_cmd_set_config_hdr)
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#define ND_IOCTL_VENDOR _IOWR(ND_IOCTL, ND_CMD_VENDOR,\
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struct nd_cmd_vendor_hdr)
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#define ND_IOCTL_ARS_CAP _IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\
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struct nd_cmd_ars_cap)
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#define ND_IOCTL_ARS_START _IOWR(ND_IOCTL, ND_CMD_ARS_START,\
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struct nd_cmd_ars_start)
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#define ND_IOCTL_ARS_STATUS _IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\
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struct nd_cmd_ars_status)
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#define ND_IOCTL_CLEAR_ERROR _IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\
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struct nd_cmd_clear_error)
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#define ND_DEVICE_DIMM 1 /* nd_dimm: container for "config data" */
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#define ND_DEVICE_REGION_PMEM 2 /* nd_region: (parent of PMEM namespaces) */
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#define ND_DEVICE_REGION_BLK 3 /* nd_region: (parent of BLK namespaces) */
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#define ND_DEVICE_NAMESPACE_IO 4 /* legacy persistent memory */
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#define ND_DEVICE_NAMESPACE_PMEM 5 /* PMEM namespace (may alias with BLK) */
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#define ND_DEVICE_NAMESPACE_BLK 6 /* BLK namespace (may alias with PMEM) */
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enum nd_driver_flags {
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ND_DRIVER_DIMM = 1 << ND_DEVICE_DIMM,
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ND_DRIVER_REGION_PMEM = 1 << ND_DEVICE_REGION_PMEM,
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ND_DRIVER_REGION_BLK = 1 << ND_DEVICE_REGION_BLK,
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ND_DRIVER_NAMESPACE_IO = 1 << ND_DEVICE_NAMESPACE_IO,
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ND_DRIVER_NAMESPACE_PMEM = 1 << ND_DEVICE_NAMESPACE_PMEM,
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ND_DRIVER_NAMESPACE_BLK = 1 << ND_DEVICE_NAMESPACE_BLK,
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};
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enum {
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ND_MIN_NAMESPACE_SIZE = 0x00400000,
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};
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enum ars_masks {
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ARS_STATUS_MASK = 0x0000FFFF,
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ARS_EXT_STATUS_SHIFT = 16,
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};
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#endif /* __NDCTL_H__ */
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