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To implement frequency hopping and spread spectrum clocking function, we introduce new clock type and APIs to handle FHCTL hardware. Co-developed-by: Edward-JW Yang <edward-jw.yang@mediatek.com> Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com> Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221121122957.21611-4-johnson.wang@mediatek.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
26 lines
557 B
C
26 lines
557 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Edward-JW Yang <edward-jw.yang@mediatek.com>
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*/
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#ifndef __CLK_FHCTL_H
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#define __CLK_FHCTL_H
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struct fhctl_offset {
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u32 offset_hp_en;
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u32 offset_clk_con;
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u32 offset_rst_con;
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u32 offset_slope0;
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u32 offset_slope1;
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u32 offset_cfg;
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u32 offset_updnlmt;
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u32 offset_dds;
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u32 offset_dvfs;
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u32 offset_mon;
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};
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const struct fhctl_offset *fhctl_get_offset_table(void);
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const struct fh_operation *fhctl_get_ops(void);
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void fhctl_hw_init(struct mtk_fh *fh);
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#endif
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