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![Codrin Ciubotariu](/assets/img/avatar_default.png)
Add platform support for the new IP found on sam9x60 SoC. For this version, if the peripheral clk is above 100MHz, the HALFR bit must be set. This bit is available only if the IP can generate a random number every 168 cycles (instead of 84). Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
199 lines
4.2 KiB
C
199 lines
4.2 KiB
C
/*
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* Copyright (c) 2011 Peter Korsgaard <jacmet@sunsite.dk>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/hw_random.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#define TRNG_CR 0x00
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#define TRNG_MR 0x04
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#define TRNG_ISR 0x1c
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#define TRNG_ODATA 0x50
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#define TRNG_KEY 0x524e4700 /* RNG */
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#define TRNG_HALFR BIT(0) /* generate RN every 168 cycles */
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struct atmel_trng_data {
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bool has_half_rate;
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};
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struct atmel_trng {
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struct clk *clk;
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void __iomem *base;
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struct hwrng rng;
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};
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static int atmel_trng_read(struct hwrng *rng, void *buf, size_t max,
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bool wait)
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{
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struct atmel_trng *trng = container_of(rng, struct atmel_trng, rng);
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u32 *data = buf;
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/* data ready? */
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if (readl(trng->base + TRNG_ISR) & 1) {
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*data = readl(trng->base + TRNG_ODATA);
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/*
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ensure data ready is only set again AFTER the next data
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word is ready in case it got set between checking ISR
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and reading ODATA, so we don't risk re-reading the
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same word
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*/
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readl(trng->base + TRNG_ISR);
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return 4;
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} else
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return 0;
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}
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static void atmel_trng_enable(struct atmel_trng *trng)
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{
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writel(TRNG_KEY | 1, trng->base + TRNG_CR);
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}
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static void atmel_trng_disable(struct atmel_trng *trng)
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{
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writel(TRNG_KEY, trng->base + TRNG_CR);
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}
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static int atmel_trng_probe(struct platform_device *pdev)
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{
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struct atmel_trng *trng;
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const struct atmel_trng_data *data;
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int ret;
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trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL);
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if (!trng)
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return -ENOMEM;
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trng->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(trng->base))
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return PTR_ERR(trng->base);
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trng->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(trng->clk))
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return PTR_ERR(trng->clk);
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data = of_device_get_match_data(&pdev->dev);
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if (!data)
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return -ENODEV;
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if (data->has_half_rate) {
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unsigned long rate = clk_get_rate(trng->clk);
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/* if peripheral clk is above 100MHz, set HALFR */
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if (rate > 100000000)
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writel(TRNG_HALFR, trng->base + TRNG_MR);
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}
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ret = clk_prepare_enable(trng->clk);
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if (ret)
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return ret;
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atmel_trng_enable(trng);
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trng->rng.name = pdev->name;
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trng->rng.read = atmel_trng_read;
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ret = devm_hwrng_register(&pdev->dev, &trng->rng);
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if (ret)
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goto err_register;
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platform_set_drvdata(pdev, trng);
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return 0;
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err_register:
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clk_disable_unprepare(trng->clk);
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return ret;
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}
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static int atmel_trng_remove(struct platform_device *pdev)
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{
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struct atmel_trng *trng = platform_get_drvdata(pdev);
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atmel_trng_disable(trng);
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clk_disable_unprepare(trng->clk);
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return 0;
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}
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#ifdef CONFIG_PM
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static int atmel_trng_suspend(struct device *dev)
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{
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struct atmel_trng *trng = dev_get_drvdata(dev);
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atmel_trng_disable(trng);
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clk_disable_unprepare(trng->clk);
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return 0;
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}
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static int atmel_trng_resume(struct device *dev)
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{
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struct atmel_trng *trng = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(trng->clk);
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if (ret)
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return ret;
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atmel_trng_enable(trng);
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return 0;
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}
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static const struct dev_pm_ops atmel_trng_pm_ops = {
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.suspend = atmel_trng_suspend,
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.resume = atmel_trng_resume,
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};
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#endif /* CONFIG_PM */
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static const struct atmel_trng_data at91sam9g45_config = {
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.has_half_rate = false,
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};
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static const struct atmel_trng_data sam9x60_config = {
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.has_half_rate = true,
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};
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static const struct of_device_id atmel_trng_dt_ids[] = {
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{
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.compatible = "atmel,at91sam9g45-trng",
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.data = &at91sam9g45_config,
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}, {
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.compatible = "microchip,sam9x60-trng",
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.data = &sam9x60_config,
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}, {
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/* sentinel */
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}
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};
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MODULE_DEVICE_TABLE(of, atmel_trng_dt_ids);
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static struct platform_driver atmel_trng_driver = {
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.probe = atmel_trng_probe,
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.remove = atmel_trng_remove,
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.driver = {
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.name = "atmel-trng",
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#ifdef CONFIG_PM
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.pm = &atmel_trng_pm_ops,
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#endif /* CONFIG_PM */
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.of_match_table = atmel_trng_dt_ids,
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},
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};
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module_platform_driver(atmel_trng_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
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MODULE_DESCRIPTION("Atmel true random number generator driver");
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