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34025fb0c4
ACK packets are generally associated with request completion and resource release and therefore should be sent first. This patch optimizes the send engine by using the following policies: (1) QPs with RVT_S_ACK_PENDING bit set in qp->s_flags or qpriv->s_flags should have their priority incremented; (2) QPs with ACK or TID-ACK packet queued should have their priority incremented; (3) When a QP is queued to the wait list due to resource constraints, it will be queued to the head if it has ACK packet to send; (4) When selecting qps to run from the wait list, the one with the highest priority and starve_cnt will be selected; each priority will be equivalent to a fixed number of starve_cnt (16). Reviewed-by: Mitko Haralanov <mitko.haralanov@intel.com> Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Kaike Wan <kaike.wan@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
136 lines
4.4 KiB
C
136 lines
4.4 KiB
C
/*
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* Copyright(c) 2016 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef HFI1_SDMA_TXREQ_H
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#define HFI1_SDMA_TXREQ_H
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/* increased for AHG */
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#define NUM_DESC 6
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/*
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* struct sdma_desc - canonical fragment descriptor
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*
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* This is the descriptor carried in the tx request
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* corresponding to each fragment.
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*
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*/
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struct sdma_desc {
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/* private: don't use directly */
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u64 qw[2];
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};
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/**
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* struct sdma_txreq - the sdma_txreq structure (one per packet)
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* @list: for use by user and by queuing for wait
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*
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* This is the representation of a packet which consists of some
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* number of fragments. Storage is provided to within the structure.
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* for all fragments.
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*
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* The storage for the descriptors are automatically extended as needed
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* when the currently allocation is exceeded.
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*
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* The user (Verbs or PSM) may overload this structure with fields
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* specific to their use by putting this struct first in their struct.
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* The method of allocation of the overloaded structure is user dependent
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*
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* The list is the only public field in the structure.
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*
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*/
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#define SDMA_TXREQ_S_OK 0
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#define SDMA_TXREQ_S_SENDERROR 1
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#define SDMA_TXREQ_S_ABORTED 2
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#define SDMA_TXREQ_S_SHUTDOWN 3
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/* flags bits */
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#define SDMA_TXREQ_F_URGENT 0x0001
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#define SDMA_TXREQ_F_AHG_COPY 0x0002
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#define SDMA_TXREQ_F_USE_AHG 0x0004
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#define SDMA_TXREQ_F_VIP 0x0010
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struct sdma_txreq;
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typedef void (*callback_t)(struct sdma_txreq *, int);
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struct iowait;
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struct sdma_txreq {
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struct list_head list;
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/* private: */
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struct sdma_desc *descp;
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/* private: */
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void *coalesce_buf;
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/* private: */
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struct iowait *wait;
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/* private: */
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callback_t complete;
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#ifdef CONFIG_HFI1_DEBUG_SDMA_ORDER
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u64 sn;
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#endif
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/* private: - used in coalesce/pad processing */
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u16 packet_len;
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/* private: - down-counted to trigger last */
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u16 tlen;
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/* private: */
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u16 num_desc;
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/* private: */
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u16 desc_limit;
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/* private: */
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u16 next_descq_idx;
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/* private: */
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u16 coalesce_idx;
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/* private: flags */
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u16 flags;
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/* private: */
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struct sdma_desc descs[NUM_DESC];
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};
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static inline int sdma_txreq_built(struct sdma_txreq *tx)
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{
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return tx->num_desc;
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}
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#endif /* HFI1_SDMA_TXREQ_H */
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