mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-28 05:12:49 +00:00
38814330fe
- Convert FPGA bridge, all TPMs (finally), and Rockchip HDMI bindings to schemas - Improvements in Samsung GPU schemas - A few more cases of dropping unneeded quotes in schemas - Merge QCom idle-states txt binding into common idle-states schema - Add X1E80100, SM8650, SM8650, and SDX75 SoCs to QCom Power Domain Controller - Add NXP i.mx8dl to SCU PD - Add synaptics r63353 panel controller - Clarify the wording around the use of 'wakeup-source' property - Add a DTS coding style doc - Add smi vendor prefix - Fix DT_SCHEMA_FILES incorrect matching of paths outside the kernel tree - Disable sysfb (e.g. EFI FB) when simple-framebuffer node is present - Fix double free in of_parse_phandle_with_args_map() - A couple of kerneldoc fixes -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmWhWgYACgkQ+vtdtY28 YcPHeA//f6xoTczQDavkfVcl+9vfR6uLXAq/sDj0t3qiEbRuBG15dAzGZJGI8Pro 7T9+6wFRS89lwS8qd1wJvoDTlIxcZebvBapzNp3e0XSis98f89qqqDnfxilKgPau QF+mAlQ2tEZoHYUQIGXbjyq9X8GqQ3KGibkfowmdh5NFw5ORWaz9d0Fmiank620a gpH/jCZFBmboWlnKbJKUV8yjna/T8XCPqWUGcPst3ByTNEWToAMInpL4SOaw80dn WdAyZGS8K9GDwrvwdjIFUipcLGXk2kQLQhlOIm9wP/qdpoLfzdLuK96njiqv8PP/ /pDJrtDcGNkFi5327OQXoYB+UhDiouQJWSVKphZiwPuW/xpbpEkC00bZztZ6tMOl qilXuAbDwb+1cjI9HO95w/SDbCppISvXDslJuLFhyLA/FBmMewe8ypuh6vm7JMoe MKSfkjDEyBdKEp1iySyVKxVfIa4Ph7jR9B8bDGOaF0/bpzsB5e51pPH0oc9lLv8L No+AKQnyijruj6F+LVhIimgKLN6zuFqfgOgVshGYbEhAVbbT4cBx4NHGFXqL+6DP FedBjqi0mdIECF+F8FcfKpO80Pi+1bxjgLPYt5d67y+nZUIEe2xJUOdp07f80cHQ Qo0L0h9UVI8pKrWBbtQXeeAMG9l4SMwriazoAzudvUk9Hlh3LWk= =5zC/ -----END PGP SIGNATURE----- Merge tag 'devicetree-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Convert FPGA bridge, all TPMs (finally), and Rockchip HDMI bindings to schemas - Improvements in Samsung GPU schemas - A few more cases of dropping unneeded quotes in schemas - Merge QCom idle-states txt binding into common idle-states schema - Add X1E80100, SM8650, SM8650, and SDX75 SoCs to QCom Power Domain Controller - Add NXP i.mx8dl to SCU PD - Add synaptics r63353 panel controller - Clarify the wording around the use of 'wakeup-source' property - Add a DTS coding style doc - Add smi vendor prefix - Fix DT_SCHEMA_FILES incorrect matching of paths outside the kernel tree - Disable sysfb (e.g. EFI FB) when simple-framebuffer node is present - Fix double free in of_parse_phandle_with_args_map() - A couple of kerneldoc fixes * tag 'devicetree-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (37 commits) of: unittest: Fix of_count_phandle_with_args() expected value message dt-bindings: fpga: altera: Convert bridge bindings to yaml dt-bindings: fpga: Convert bridge binding to yaml dt-bindings: vendor-prefixes: Add smi dt-bindings: power: Clarify wording for wakeup-source property of: Fix double free in of_parse_phandle_with_args_map dt-bindings: ignore paths outside kernel for DT_SCHEMA_FILES drivers: of: Fixed kernel doc warning dt-bindings: tpm: Document Microsoft fTPM bindings dt-bindings: tpm: Convert IBM vTPM bindings to DT schema dt-bindings: tpm: Convert Google Cr50 bindings to DT schema dt-bindings: tpm: Consolidate TCG TIS bindings dt-bindings: display: rockchip,inno-hdmi: Document RK3128 compatible dt-bindings: arm: Add remote etm dt-binding dt-bindings: mmc: sdhci-pxa: Fix 'regs' typo media: dt-bindings: samsung,s5p-mfc: Fix iommu properties schemas dt-bindings: display: panel: Add synaptics r63353 panel controller dt-bindings: arm: merge qcom,idle-state with idle-state dt-bindings: drm: rockchip: convert inno_hdmi-rockchip.txt to yaml dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries ...
182 lines
4.8 KiB
YAML
182 lines
4.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/cache/qcom,llcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Last Level Cache Controller
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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description: |
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LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
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that can be shared by multiple clients. Clients here are different cores in the
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SoC, the idea is to minimize the local caches at the clients and migrate to
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common pool of memory. Cache memory is divided into partitions called slices
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which are assigned to clients. Clients can query the slice details, activate
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and deactivate them.
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properties:
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compatible:
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enum:
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- qcom,qdu1000-llcc
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- qcom,sc7180-llcc
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- qcom,sc7280-llcc
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- qcom,sc8180x-llcc
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- qcom,sc8280xp-llcc
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- qcom,sdm845-llcc
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- qcom,sm6350-llcc
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- qcom,sm7150-llcc
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- qcom,sm8150-llcc
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- qcom,sm8250-llcc
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- qcom,sm8350-llcc
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- qcom,sm8450-llcc
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- qcom,sm8550-llcc
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- qcom,sm8650-llcc
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- qcom,x1e80100-llcc
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reg:
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minItems: 2
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maxItems: 9
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reg-names:
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minItems: 2
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maxItems: 9
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interrupts:
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maxItems: 1
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nvmem-cells:
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items:
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- description: Reference to an nvmem node for multi channel DDR
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nvmem-cell-names:
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items:
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- const: multi-chan-ddr
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required:
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- compatible
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- reg
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- reg-names
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,qdu1000-llcc
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- qcom,sc7180-llcc
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- qcom,sm6350-llcc
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then:
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properties:
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reg:
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items:
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- description: LLCC0 base register region
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- description: LLCC broadcast base register region
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reg-names:
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items:
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- const: llcc0_base
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- const: llcc_broadcast_base
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sc7280-llcc
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then:
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properties:
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reg:
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items:
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- description: LLCC0 base register region
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- description: LLCC1 base register region
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- description: LLCC broadcast base register region
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reg-names:
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items:
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- const: llcc0_base
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- const: llcc1_base
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- const: llcc_broadcast_base
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sc8180x-llcc
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- qcom,sc8280xp-llcc
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- qcom,x1e80100-llcc
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then:
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properties:
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reg:
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items:
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- description: LLCC0 base register region
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- description: LLCC1 base register region
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- description: LLCC2 base register region
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- description: LLCC3 base register region
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- description: LLCC4 base register region
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- description: LLCC5 base register region
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- description: LLCC6 base register region
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- description: LLCC7 base register region
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- description: LLCC broadcast base register region
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reg-names:
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items:
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- const: llcc0_base
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- const: llcc1_base
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- const: llcc2_base
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- const: llcc3_base
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- const: llcc4_base
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- const: llcc5_base
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- const: llcc6_base
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- const: llcc7_base
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- const: llcc_broadcast_base
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sdm845-llcc
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- qcom,sm8150-llcc
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- qcom,sm8250-llcc
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- qcom,sm8350-llcc
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- qcom,sm8450-llcc
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- qcom,sm8550-llcc
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then:
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properties:
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reg:
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items:
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- description: LLCC0 base register region
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- description: LLCC1 base register region
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- description: LLCC2 base register region
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- description: LLCC3 base register region
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- description: LLCC broadcast base register region
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reg-names:
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items:
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- const: llcc0_base
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- const: llcc1_base
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- const: llcc2_base
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- const: llcc3_base
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- const: llcc_broadcast_base
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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system-cache-controller@1100000 {
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compatible = "qcom,sdm845-llcc";
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reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>,
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<0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>,
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<0 0x01300000 0 0x50000>;
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reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
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"llcc3_base", "llcc_broadcast_base";
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interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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