76 lines
1.6 KiB
YAML
76 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright 2022 Unisoc Inc.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/sprd,gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Unisoc GPIO controller
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maintainers:
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- Orson Zhai <orsonzhai@gmail.com>
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- Baolin Wang <baolin.wang7@gmail.com>
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- Chunyan Zhang <zhang.lyra@gmail.com>
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description: |
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The controller's registers are organized as sets of sixteen 16-bit
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registers with each set controlling a bank of up to 16 pins. A single
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interrupt is shared for all of the banks handled by the controller.
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properties:
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compatible:
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oneOf:
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- const: sprd,sc9860-gpio
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- items:
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- enum:
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- sprd,ums512-gpio
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- const: sprd,sc9860-gpio
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reg:
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maxItems: 1
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gpio-controller: true
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"#gpio-cells":
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const: 2
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interrupt-controller: true
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"#interrupt-cells":
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const: 2
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interrupts:
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maxItems: 1
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description: The interrupt shared by all GPIO lines for this controller.
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required:
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- compatible
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- reg
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- gpio-controller
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- "#gpio-cells"
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- interrupt-controller
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- "#interrupt-cells"
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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ap_gpio: gpio@40280000 {
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compatible = "sprd,sc9860-gpio";
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reg = <0 0x40280000 0 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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...
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