Heinrich Schuchardt 8355eb499d dt-bindings: riscv: cpus: reg matches hart ID ... Add a description to the CPU reg property to clarify that the reg property must match the hart ID. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>		2024-02-26 09:44:33 +00:00
..
canaan.yaml	dt-bindings: Change Damien Le Moal's contact email	2023-06-08 07:31:27 -06:00
cpus.yaml	dt-bindings: riscv: cpus: reg matches hart ID	2024-02-26 09:44:33 +00:00
extensions.yaml	dt-bindings: riscv: permit numbers in "riscv,isa"	2024-01-11 07:36:29 -08:00
microchip.yaml	dt-bindings: riscv: microchip: document the Aldec TySoM	2023-01-20 22:03:37 +00:00
sifive.yaml	dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board	2021-01-07 17:37:41 -08:00
sophgo.yaml	dt-bindings: riscv: Add SOPHGO Huashan Pi board compatibles	2023-11-30 12:40:36 +00:00
starfive.yaml	dt-bindings: riscv: correct starfive visionfive 2 compatibles	2023-02-16 22:08:25 +01:00
sunxi.yaml	dt-bindings: arm: sunxi: document MangoPi MQ-R board names	2023-03-27 22:45:22 +02:00
thead.yaml	dt-bindings: riscv: Add BeagleV Ahead board compatibles	2023-08-16 18:59:24 +01:00