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![Thomas Gleixner](/assets/img/avatar_default.png)
Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1005 lines
26 KiB
C
1005 lines
26 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Allwinner sun4i USB phy driver
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*
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* Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
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*
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* Based on code from
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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*
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* Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
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* Copyright (C) 2013 Samsung Electronics Co., Ltd.
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* Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/extcon-provider.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/phy/phy.h>
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#include <linux/phy/phy-sun4i-usb.h>
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#include <linux/platform_device.h>
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#include <linux/power_supply.h>
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#include <linux/regulator/consumer.h>
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#include <linux/reset.h>
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#include <linux/spinlock.h>
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#include <linux/usb/of.h>
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#include <linux/workqueue.h>
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#define REG_ISCR 0x00
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#define REG_PHYCTL_A10 0x04
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#define REG_PHYBIST 0x08
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#define REG_PHYTUNE 0x0c
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#define REG_PHYCTL_A33 0x10
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#define REG_PHY_OTGCTL 0x20
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#define REG_PMU_UNK1 0x10
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#define PHYCTL_DATA BIT(7)
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#define OTGCTL_ROUTE_MUSB BIT(0)
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#define SUNXI_AHB_ICHR8_EN BIT(10)
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#define SUNXI_AHB_INCR4_BURST_EN BIT(9)
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#define SUNXI_AHB_INCRX_ALIGN_EN BIT(8)
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#define SUNXI_ULPI_BYPASS_EN BIT(0)
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/* ISCR, Interface Status and Control bits */
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#define ISCR_ID_PULLUP_EN (1 << 17)
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#define ISCR_DPDM_PULLUP_EN (1 << 16)
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/* sunxi has the phy id/vbus pins not connected, so we use the force bits */
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#define ISCR_FORCE_ID_MASK (3 << 14)
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#define ISCR_FORCE_ID_LOW (2 << 14)
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#define ISCR_FORCE_ID_HIGH (3 << 14)
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#define ISCR_FORCE_VBUS_MASK (3 << 12)
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#define ISCR_FORCE_VBUS_LOW (2 << 12)
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#define ISCR_FORCE_VBUS_HIGH (3 << 12)
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/* Common Control Bits for Both PHYs */
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#define PHY_PLL_BW 0x03
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#define PHY_RES45_CAL_EN 0x0c
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/* Private Control Bits for Each PHY */
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#define PHY_TX_AMPLITUDE_TUNE 0x20
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#define PHY_TX_SLEWRATE_TUNE 0x22
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#define PHY_VBUSVALID_TH_SEL 0x25
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#define PHY_PULLUP_RES_SEL 0x27
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#define PHY_OTG_FUNC_EN 0x28
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#define PHY_VBUS_DET_EN 0x29
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#define PHY_DISCON_TH_SEL 0x2a
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#define PHY_SQUELCH_DETECT 0x3c
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/* A83T specific control bits for PHY0 */
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#define PHY_CTL_VBUSVLDEXT BIT(5)
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#define PHY_CTL_SIDDQ BIT(3)
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/* A83T specific control bits for PHY2 HSIC */
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#define SUNXI_EHCI_HS_FORCE BIT(20)
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#define SUNXI_HSIC_CONNECT_DET BIT(17)
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#define SUNXI_HSIC_CONNECT_INT BIT(16)
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#define SUNXI_HSIC BIT(1)
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#define MAX_PHYS 4
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/*
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* Note do not raise the debounce time, we must report Vusb high within 100ms
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* otherwise we get Vbus errors
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*/
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#define DEBOUNCE_TIME msecs_to_jiffies(50)
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#define POLL_TIME msecs_to_jiffies(250)
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enum sun4i_usb_phy_type {
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sun4i_a10_phy,
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sun6i_a31_phy,
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sun8i_a33_phy,
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sun8i_a83t_phy,
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sun8i_h3_phy,
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sun8i_r40_phy,
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sun8i_v3s_phy,
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sun50i_a64_phy,
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sun50i_h6_phy,
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};
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struct sun4i_usb_phy_cfg {
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int num_phys;
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int hsic_index;
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enum sun4i_usb_phy_type type;
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u32 disc_thresh;
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u8 phyctl_offset;
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bool dedicated_clocks;
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bool enable_pmu_unk1;
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bool phy0_dual_route;
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int missing_phys;
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};
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struct sun4i_usb_phy_data {
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void __iomem *base;
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const struct sun4i_usb_phy_cfg *cfg;
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enum usb_dr_mode dr_mode;
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spinlock_t reg_lock; /* guard access to phyctl reg */
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struct sun4i_usb_phy {
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struct phy *phy;
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void __iomem *pmu;
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struct regulator *vbus;
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struct reset_control *reset;
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struct clk *clk;
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struct clk *clk2;
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bool regulator_on;
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int index;
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} phys[MAX_PHYS];
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/* phy0 / otg related variables */
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struct extcon_dev *extcon;
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bool phy0_init;
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struct gpio_desc *id_det_gpio;
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struct gpio_desc *vbus_det_gpio;
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struct power_supply *vbus_power_supply;
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struct notifier_block vbus_power_nb;
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bool vbus_power_nb_registered;
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bool force_session_end;
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int id_det_irq;
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int vbus_det_irq;
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int id_det;
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int vbus_det;
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struct delayed_work detect;
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};
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#define to_sun4i_usb_phy_data(phy) \
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container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
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static void sun4i_usb_phy0_update_iscr(struct phy *_phy, u32 clr, u32 set)
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{
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struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
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struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
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u32 iscr;
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iscr = readl(data->base + REG_ISCR);
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iscr &= ~clr;
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iscr |= set;
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writel(iscr, data->base + REG_ISCR);
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}
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static void sun4i_usb_phy0_set_id_detect(struct phy *phy, u32 val)
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{
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if (val)
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val = ISCR_FORCE_ID_HIGH;
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else
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val = ISCR_FORCE_ID_LOW;
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sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_ID_MASK, val);
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}
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static void sun4i_usb_phy0_set_vbus_detect(struct phy *phy, u32 val)
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{
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if (val)
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val = ISCR_FORCE_VBUS_HIGH;
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else
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val = ISCR_FORCE_VBUS_LOW;
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sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_VBUS_MASK, val);
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}
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static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
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int len)
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{
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struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
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u32 temp, usbc_bit = BIT(phy->index * 2);
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void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
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unsigned long flags;
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int i;
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spin_lock_irqsave(&phy_data->reg_lock, flags);
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if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) {
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/* SoCs newer than A33 need us to set phyctl to 0 explicitly */
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writel(0, phyctl);
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}
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for (i = 0; i < len; i++) {
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temp = readl(phyctl);
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/* clear the address portion */
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temp &= ~(0xff << 8);
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/* set the address */
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temp |= ((addr + i) << 8);
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writel(temp, phyctl);
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/* set the data bit and clear usbc bit*/
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temp = readb(phyctl);
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if (data & 0x1)
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temp |= PHYCTL_DATA;
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else
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temp &= ~PHYCTL_DATA;
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temp &= ~usbc_bit;
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writeb(temp, phyctl);
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/* pulse usbc_bit */
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temp = readb(phyctl);
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temp |= usbc_bit;
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writeb(temp, phyctl);
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temp = readb(phyctl);
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temp &= ~usbc_bit;
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writeb(temp, phyctl);
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data >>= 1;
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}
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spin_unlock_irqrestore(&phy_data->reg_lock, flags);
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}
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static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
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{
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struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
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u32 bits, reg_value;
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if (!phy->pmu)
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return;
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bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
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SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
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/* A83T USB2 is HSIC */
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if (phy_data->cfg->type == sun8i_a83t_phy && phy->index == 2)
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bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT |
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SUNXI_HSIC;
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reg_value = readl(phy->pmu);
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if (enable)
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reg_value |= bits;
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else
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reg_value &= ~bits;
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writel(reg_value, phy->pmu);
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}
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static int sun4i_usb_phy_init(struct phy *_phy)
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{
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struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
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struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
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int ret;
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u32 val;
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ret = clk_prepare_enable(phy->clk);
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if (ret)
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return ret;
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ret = clk_prepare_enable(phy->clk2);
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if (ret) {
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clk_disable_unprepare(phy->clk);
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return ret;
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}
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ret = reset_control_deassert(phy->reset);
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if (ret) {
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clk_disable_unprepare(phy->clk2);
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clk_disable_unprepare(phy->clk);
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return ret;
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}
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if (data->cfg->type == sun8i_a83t_phy ||
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data->cfg->type == sun50i_h6_phy) {
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if (phy->index == 0) {
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val = readl(data->base + data->cfg->phyctl_offset);
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val |= PHY_CTL_VBUSVLDEXT;
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val &= ~PHY_CTL_SIDDQ;
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writel(val, data->base + data->cfg->phyctl_offset);
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}
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} else {
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if (phy->pmu && data->cfg->enable_pmu_unk1) {
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val = readl(phy->pmu + REG_PMU_UNK1);
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writel(val & ~2, phy->pmu + REG_PMU_UNK1);
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}
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/* Enable USB 45 Ohm resistor calibration */
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if (phy->index == 0)
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sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
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/* Adjust PHY's magnitude and rate */
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sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
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/* Disconnect threshold adjustment */
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sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL,
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data->cfg->disc_thresh, 2);
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}
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sun4i_usb_phy_passby(phy, 1);
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if (phy->index == 0) {
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data->phy0_init = true;
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/* Enable pull-ups */
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sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_DPDM_PULLUP_EN);
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sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_ID_PULLUP_EN);
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/* Force ISCR and cable state updates */
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data->id_det = -1;
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data->vbus_det = -1;
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queue_delayed_work(system_wq, &data->detect, 0);
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}
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return 0;
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}
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static int sun4i_usb_phy_exit(struct phy *_phy)
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{
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struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
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struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
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if (phy->index == 0) {
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if (data->cfg->type == sun8i_a83t_phy ||
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data->cfg->type == sun50i_h6_phy) {
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void __iomem *phyctl = data->base +
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data->cfg->phyctl_offset;
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writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl);
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}
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/* Disable pull-ups */
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sun4i_usb_phy0_update_iscr(_phy, ISCR_DPDM_PULLUP_EN, 0);
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sun4i_usb_phy0_update_iscr(_phy, ISCR_ID_PULLUP_EN, 0);
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data->phy0_init = false;
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}
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sun4i_usb_phy_passby(phy, 0);
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reset_control_assert(phy->reset);
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clk_disable_unprepare(phy->clk2);
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clk_disable_unprepare(phy->clk);
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return 0;
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}
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static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data)
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{
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switch (data->dr_mode) {
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case USB_DR_MODE_OTG:
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if (data->id_det_gpio)
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return gpiod_get_value_cansleep(data->id_det_gpio);
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else
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return 1; /* Fallback to peripheral mode */
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case USB_DR_MODE_HOST:
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return 0;
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case USB_DR_MODE_PERIPHERAL:
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default:
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return 1;
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}
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}
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static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data)
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{
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if (data->vbus_det_gpio)
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return gpiod_get_value_cansleep(data->vbus_det_gpio);
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if (data->vbus_power_supply) {
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union power_supply_propval val;
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int r;
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r = power_supply_get_property(data->vbus_power_supply,
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POWER_SUPPLY_PROP_PRESENT, &val);
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if (r == 0)
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return val.intval;
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}
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/* Fallback: report vbus as high */
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return 1;
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}
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static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data)
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{
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return data->vbus_det_gpio || data->vbus_power_supply;
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}
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static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data)
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{
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if ((data->id_det_gpio && data->id_det_irq <= 0) ||
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(data->vbus_det_gpio && data->vbus_det_irq <= 0))
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return true;
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/*
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* The A31/A23/A33 companion pmics (AXP221/AXP223) do not
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* generate vbus change interrupts when the board is driving
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* vbus using the N_VBUSEN pin on the pmic, so we must poll
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* when using the pmic for vbus-det _and_ we're driving vbus.
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*/
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if ((data->cfg->type == sun6i_a31_phy ||
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data->cfg->type == sun8i_a33_phy) &&
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data->vbus_power_supply && data->phys[0].regulator_on)
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return true;
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return false;
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}
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static int sun4i_usb_phy_power_on(struct phy *_phy)
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{
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struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
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struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
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int ret;
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if (!phy->vbus || phy->regulator_on)
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return 0;
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/* For phy0 only turn on Vbus if we don't have an ext. Vbus */
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if (phy->index == 0 && sun4i_usb_phy0_have_vbus_det(data) &&
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data->vbus_det) {
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dev_warn(&_phy->dev, "External vbus detected, not enabling our own vbus\n");
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return 0;
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}
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ret = regulator_enable(phy->vbus);
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if (ret)
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return ret;
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phy->regulator_on = true;
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/* We must report Vbus high within OTG_TIME_A_WAIT_VRISE msec. */
|
|
if (phy->index == 0 && sun4i_usb_phy0_poll(data))
|
|
mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sun4i_usb_phy_power_off(struct phy *_phy)
|
|
{
|
|
struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
|
|
struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
|
|
|
|
if (!phy->vbus || !phy->regulator_on)
|
|
return 0;
|
|
|
|
regulator_disable(phy->vbus);
|
|
phy->regulator_on = false;
|
|
|
|
/*
|
|
* phy0 vbus typically slowly discharges, sometimes this causes the
|
|
* Vbus gpio to not trigger an edge irq on Vbus off, so force a rescan.
|
|
*/
|
|
if (phy->index == 0 && !sun4i_usb_phy0_poll(data))
|
|
mod_delayed_work(system_wq, &data->detect, POLL_TIME);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sun4i_usb_phy_set_mode(struct phy *_phy,
|
|
enum phy_mode mode, int submode)
|
|
{
|
|
struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
|
|
struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
|
|
int new_mode;
|
|
|
|
if (phy->index != 0) {
|
|
if (mode == PHY_MODE_USB_HOST)
|
|
return 0;
|
|
return -EINVAL;
|
|
}
|
|
|
|
switch (mode) {
|
|
case PHY_MODE_USB_HOST:
|
|
new_mode = USB_DR_MODE_HOST;
|
|
break;
|
|
case PHY_MODE_USB_DEVICE:
|
|
new_mode = USB_DR_MODE_PERIPHERAL;
|
|
break;
|
|
case PHY_MODE_USB_OTG:
|
|
new_mode = USB_DR_MODE_OTG;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (new_mode != data->dr_mode) {
|
|
dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode);
|
|
data->dr_mode = new_mode;
|
|
}
|
|
|
|
data->id_det = -1; /* Force reprocessing of id */
|
|
data->force_session_end = true;
|
|
queue_delayed_work(system_wq, &data->detect, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled)
|
|
{
|
|
struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
|
|
|
|
sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
|
|
}
|
|
EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect);
|
|
|
|
static const struct phy_ops sun4i_usb_phy_ops = {
|
|
.init = sun4i_usb_phy_init,
|
|
.exit = sun4i_usb_phy_exit,
|
|
.power_on = sun4i_usb_phy_power_on,
|
|
.power_off = sun4i_usb_phy_power_off,
|
|
.set_mode = sun4i_usb_phy_set_mode,
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det)
|
|
{
|
|
u32 regval;
|
|
|
|
regval = readl(data->base + REG_PHY_OTGCTL);
|
|
if (id_det == 0) {
|
|
/* Host mode. Route phy0 to EHCI/OHCI */
|
|
regval &= ~OTGCTL_ROUTE_MUSB;
|
|
} else {
|
|
/* Peripheral mode. Route phy0 to MUSB */
|
|
regval |= OTGCTL_ROUTE_MUSB;
|
|
}
|
|
writel(regval, data->base + REG_PHY_OTGCTL);
|
|
}
|
|
|
|
static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
|
|
{
|
|
struct sun4i_usb_phy_data *data =
|
|
container_of(work, struct sun4i_usb_phy_data, detect.work);
|
|
struct phy *phy0 = data->phys[0].phy;
|
|
struct sun4i_usb_phy *phy = phy_get_drvdata(phy0);
|
|
bool force_session_end, id_notify = false, vbus_notify = false;
|
|
int id_det, vbus_det;
|
|
|
|
if (phy0 == NULL)
|
|
return;
|
|
|
|
id_det = sun4i_usb_phy0_get_id_det(data);
|
|
vbus_det = sun4i_usb_phy0_get_vbus_det(data);
|
|
|
|
mutex_lock(&phy0->mutex);
|
|
|
|
if (!data->phy0_init) {
|
|
mutex_unlock(&phy0->mutex);
|
|
return;
|
|
}
|
|
|
|
force_session_end = data->force_session_end;
|
|
data->force_session_end = false;
|
|
|
|
if (id_det != data->id_det) {
|
|
/* id-change, force session end if we've no vbus detection */
|
|
if (data->dr_mode == USB_DR_MODE_OTG &&
|
|
!sun4i_usb_phy0_have_vbus_det(data))
|
|
force_session_end = true;
|
|
|
|
/* When entering host mode (id = 0) force end the session now */
|
|
if (force_session_end && id_det == 0) {
|
|
sun4i_usb_phy0_set_vbus_detect(phy0, 0);
|
|
msleep(200);
|
|
sun4i_usb_phy0_set_vbus_detect(phy0, 1);
|
|
}
|
|
sun4i_usb_phy0_set_id_detect(phy0, id_det);
|
|
data->id_det = id_det;
|
|
id_notify = true;
|
|
}
|
|
|
|
if (vbus_det != data->vbus_det) {
|
|
sun4i_usb_phy0_set_vbus_detect(phy0, vbus_det);
|
|
data->vbus_det = vbus_det;
|
|
vbus_notify = true;
|
|
}
|
|
|
|
mutex_unlock(&phy0->mutex);
|
|
|
|
if (id_notify) {
|
|
extcon_set_state_sync(data->extcon, EXTCON_USB_HOST,
|
|
!id_det);
|
|
/* When leaving host mode force end the session here */
|
|
if (force_session_end && id_det == 1) {
|
|
mutex_lock(&phy0->mutex);
|
|
sun4i_usb_phy0_set_vbus_detect(phy0, 0);
|
|
msleep(1000);
|
|
sun4i_usb_phy0_set_vbus_detect(phy0, 1);
|
|
mutex_unlock(&phy0->mutex);
|
|
}
|
|
|
|
/* Enable PHY0 passby for host mode only. */
|
|
sun4i_usb_phy_passby(phy, !id_det);
|
|
|
|
/* Re-route PHY0 if necessary */
|
|
if (data->cfg->phy0_dual_route)
|
|
sun4i_usb_phy0_reroute(data, id_det);
|
|
}
|
|
|
|
if (vbus_notify)
|
|
extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det);
|
|
|
|
if (sun4i_usb_phy0_poll(data))
|
|
queue_delayed_work(system_wq, &data->detect, POLL_TIME);
|
|
}
|
|
|
|
static irqreturn_t sun4i_usb_phy0_id_vbus_det_irq(int irq, void *dev_id)
|
|
{
|
|
struct sun4i_usb_phy_data *data = dev_id;
|
|
|
|
/* vbus or id changed, let the pins settle and then scan them */
|
|
mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int sun4i_usb_phy0_vbus_notify(struct notifier_block *nb,
|
|
unsigned long val, void *v)
|
|
{
|
|
struct sun4i_usb_phy_data *data =
|
|
container_of(nb, struct sun4i_usb_phy_data, vbus_power_nb);
|
|
struct power_supply *psy = v;
|
|
|
|
/* Properties on the vbus_power_supply changed, scan vbus_det */
|
|
if (val == PSY_EVENT_PROP_CHANGED && psy == data->vbus_power_supply)
|
|
mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
|
|
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
static struct phy *sun4i_usb_phy_xlate(struct device *dev,
|
|
struct of_phandle_args *args)
|
|
{
|
|
struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
|
|
|
|
if (args->args[0] >= data->cfg->num_phys)
|
|
return ERR_PTR(-ENODEV);
|
|
|
|
if (data->cfg->missing_phys & BIT(args->args[0]))
|
|
return ERR_PTR(-ENODEV);
|
|
|
|
return data->phys[args->args[0]].phy;
|
|
}
|
|
|
|
static int sun4i_usb_phy_remove(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
|
|
|
|
if (data->vbus_power_nb_registered)
|
|
power_supply_unreg_notifier(&data->vbus_power_nb);
|
|
if (data->id_det_irq > 0)
|
|
devm_free_irq(dev, data->id_det_irq, data);
|
|
if (data->vbus_det_irq > 0)
|
|
devm_free_irq(dev, data->vbus_det_irq, data);
|
|
|
|
cancel_delayed_work_sync(&data->detect);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const unsigned int sun4i_usb_phy0_cable[] = {
|
|
EXTCON_USB,
|
|
EXTCON_USB_HOST,
|
|
EXTCON_NONE,
|
|
};
|
|
|
|
static int sun4i_usb_phy_probe(struct platform_device *pdev)
|
|
{
|
|
struct sun4i_usb_phy_data *data;
|
|
struct device *dev = &pdev->dev;
|
|
struct device_node *np = dev->of_node;
|
|
struct phy_provider *phy_provider;
|
|
struct resource *res;
|
|
int i, ret;
|
|
|
|
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
spin_lock_init(&data->reg_lock);
|
|
INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan);
|
|
dev_set_drvdata(dev, data);
|
|
data->cfg = of_device_get_match_data(dev);
|
|
if (!data->cfg)
|
|
return -EINVAL;
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl");
|
|
data->base = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(data->base))
|
|
return PTR_ERR(data->base);
|
|
|
|
data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det",
|
|
GPIOD_IN);
|
|
if (IS_ERR(data->id_det_gpio)) {
|
|
dev_err(dev, "Couldn't request ID GPIO\n");
|
|
return PTR_ERR(data->id_det_gpio);
|
|
}
|
|
|
|
data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det",
|
|
GPIOD_IN);
|
|
if (IS_ERR(data->vbus_det_gpio)) {
|
|
dev_err(dev, "Couldn't request VBUS detect GPIO\n");
|
|
return PTR_ERR(data->vbus_det_gpio);
|
|
}
|
|
|
|
if (of_find_property(np, "usb0_vbus_power-supply", NULL)) {
|
|
data->vbus_power_supply = devm_power_supply_get_by_phandle(dev,
|
|
"usb0_vbus_power-supply");
|
|
if (IS_ERR(data->vbus_power_supply)) {
|
|
dev_err(dev, "Couldn't get the VBUS power supply\n");
|
|
return PTR_ERR(data->vbus_power_supply);
|
|
}
|
|
|
|
if (!data->vbus_power_supply)
|
|
return -EPROBE_DEFER;
|
|
}
|
|
|
|
data->dr_mode = of_usb_get_dr_mode_by_phy(np, 0);
|
|
|
|
data->extcon = devm_extcon_dev_allocate(dev, sun4i_usb_phy0_cable);
|
|
if (IS_ERR(data->extcon)) {
|
|
dev_err(dev, "Couldn't allocate our extcon device\n");
|
|
return PTR_ERR(data->extcon);
|
|
}
|
|
|
|
ret = devm_extcon_dev_register(dev, data->extcon);
|
|
if (ret) {
|
|
dev_err(dev, "failed to register extcon: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
for (i = 0; i < data->cfg->num_phys; i++) {
|
|
struct sun4i_usb_phy *phy = data->phys + i;
|
|
char name[16];
|
|
|
|
if (data->cfg->missing_phys & BIT(i))
|
|
continue;
|
|
|
|
snprintf(name, sizeof(name), "usb%d_vbus", i);
|
|
phy->vbus = devm_regulator_get_optional(dev, name);
|
|
if (IS_ERR(phy->vbus)) {
|
|
if (PTR_ERR(phy->vbus) == -EPROBE_DEFER) {
|
|
dev_err(dev,
|
|
"Couldn't get regulator %s... Deferring probe\n",
|
|
name);
|
|
return -EPROBE_DEFER;
|
|
}
|
|
|
|
phy->vbus = NULL;
|
|
}
|
|
|
|
if (data->cfg->dedicated_clocks)
|
|
snprintf(name, sizeof(name), "usb%d_phy", i);
|
|
else
|
|
strlcpy(name, "usb_phy", sizeof(name));
|
|
|
|
phy->clk = devm_clk_get(dev, name);
|
|
if (IS_ERR(phy->clk)) {
|
|
dev_err(dev, "failed to get clock %s\n", name);
|
|
return PTR_ERR(phy->clk);
|
|
}
|
|
|
|
/* The first PHY is always tied to OTG, and never HSIC */
|
|
if (data->cfg->hsic_index && i == data->cfg->hsic_index) {
|
|
/* HSIC needs secondary clock */
|
|
snprintf(name, sizeof(name), "usb%d_hsic_12M", i);
|
|
phy->clk2 = devm_clk_get(dev, name);
|
|
if (IS_ERR(phy->clk2)) {
|
|
dev_err(dev, "failed to get clock %s\n", name);
|
|
return PTR_ERR(phy->clk2);
|
|
}
|
|
}
|
|
|
|
snprintf(name, sizeof(name), "usb%d_reset", i);
|
|
phy->reset = devm_reset_control_get(dev, name);
|
|
if (IS_ERR(phy->reset)) {
|
|
dev_err(dev, "failed to get reset %s\n", name);
|
|
return PTR_ERR(phy->reset);
|
|
}
|
|
|
|
if (i || data->cfg->phy0_dual_route) { /* No pmu for musb */
|
|
snprintf(name, sizeof(name), "pmu%d", i);
|
|
res = platform_get_resource_byname(pdev,
|
|
IORESOURCE_MEM, name);
|
|
phy->pmu = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(phy->pmu))
|
|
return PTR_ERR(phy->pmu);
|
|
}
|
|
|
|
phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
|
|
if (IS_ERR(phy->phy)) {
|
|
dev_err(dev, "failed to create PHY %d\n", i);
|
|
return PTR_ERR(phy->phy);
|
|
}
|
|
|
|
phy->index = i;
|
|
phy_set_drvdata(phy->phy, &data->phys[i]);
|
|
}
|
|
|
|
data->id_det_irq = gpiod_to_irq(data->id_det_gpio);
|
|
if (data->id_det_irq > 0) {
|
|
ret = devm_request_irq(dev, data->id_det_irq,
|
|
sun4i_usb_phy0_id_vbus_det_irq,
|
|
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
|
|
"usb0-id-det", data);
|
|
if (ret) {
|
|
dev_err(dev, "Err requesting id-det-irq: %d\n", ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio);
|
|
if (data->vbus_det_irq > 0) {
|
|
ret = devm_request_irq(dev, data->vbus_det_irq,
|
|
sun4i_usb_phy0_id_vbus_det_irq,
|
|
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
|
|
"usb0-vbus-det", data);
|
|
if (ret) {
|
|
dev_err(dev, "Err requesting vbus-det-irq: %d\n", ret);
|
|
data->vbus_det_irq = -1;
|
|
sun4i_usb_phy_remove(pdev); /* Stop detect work */
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
if (data->vbus_power_supply) {
|
|
data->vbus_power_nb.notifier_call = sun4i_usb_phy0_vbus_notify;
|
|
data->vbus_power_nb.priority = 0;
|
|
ret = power_supply_reg_notifier(&data->vbus_power_nb);
|
|
if (ret) {
|
|
sun4i_usb_phy_remove(pdev); /* Stop detect work */
|
|
return ret;
|
|
}
|
|
data->vbus_power_nb_registered = true;
|
|
}
|
|
|
|
phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
|
|
if (IS_ERR(phy_provider)) {
|
|
sun4i_usb_phy_remove(pdev); /* Stop detect work */
|
|
return PTR_ERR(phy_provider);
|
|
}
|
|
|
|
dev_dbg(dev, "successfully loaded\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
|
|
.num_phys = 3,
|
|
.type = sun4i_a10_phy,
|
|
.disc_thresh = 3,
|
|
.phyctl_offset = REG_PHYCTL_A10,
|
|
.dedicated_clocks = false,
|
|
.enable_pmu_unk1 = false,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
|
|
.num_phys = 2,
|
|
.type = sun4i_a10_phy,
|
|
.disc_thresh = 2,
|
|
.phyctl_offset = REG_PHYCTL_A10,
|
|
.dedicated_clocks = false,
|
|
.enable_pmu_unk1 = false,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
|
|
.num_phys = 3,
|
|
.type = sun6i_a31_phy,
|
|
.disc_thresh = 3,
|
|
.phyctl_offset = REG_PHYCTL_A10,
|
|
.dedicated_clocks = true,
|
|
.enable_pmu_unk1 = false,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
|
|
.num_phys = 3,
|
|
.type = sun4i_a10_phy,
|
|
.disc_thresh = 2,
|
|
.phyctl_offset = REG_PHYCTL_A10,
|
|
.dedicated_clocks = false,
|
|
.enable_pmu_unk1 = false,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
|
|
.num_phys = 2,
|
|
.type = sun6i_a31_phy,
|
|
.disc_thresh = 3,
|
|
.phyctl_offset = REG_PHYCTL_A10,
|
|
.dedicated_clocks = true,
|
|
.enable_pmu_unk1 = false,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
|
|
.num_phys = 2,
|
|
.type = sun8i_a33_phy,
|
|
.disc_thresh = 3,
|
|
.phyctl_offset = REG_PHYCTL_A33,
|
|
.dedicated_clocks = true,
|
|
.enable_pmu_unk1 = false,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = {
|
|
.num_phys = 3,
|
|
.hsic_index = 2,
|
|
.type = sun8i_a83t_phy,
|
|
.phyctl_offset = REG_PHYCTL_A33,
|
|
.dedicated_clocks = true,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
|
|
.num_phys = 4,
|
|
.type = sun8i_h3_phy,
|
|
.disc_thresh = 3,
|
|
.phyctl_offset = REG_PHYCTL_A33,
|
|
.dedicated_clocks = true,
|
|
.enable_pmu_unk1 = true,
|
|
.phy0_dual_route = true,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = {
|
|
.num_phys = 3,
|
|
.type = sun8i_r40_phy,
|
|
.disc_thresh = 3,
|
|
.phyctl_offset = REG_PHYCTL_A33,
|
|
.dedicated_clocks = true,
|
|
.enable_pmu_unk1 = true,
|
|
.phy0_dual_route = true,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
|
|
.num_phys = 1,
|
|
.type = sun8i_v3s_phy,
|
|
.disc_thresh = 3,
|
|
.phyctl_offset = REG_PHYCTL_A33,
|
|
.dedicated_clocks = true,
|
|
.enable_pmu_unk1 = true,
|
|
.phy0_dual_route = true,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
|
|
.num_phys = 2,
|
|
.type = sun50i_a64_phy,
|
|
.disc_thresh = 3,
|
|
.phyctl_offset = REG_PHYCTL_A33,
|
|
.dedicated_clocks = true,
|
|
.enable_pmu_unk1 = true,
|
|
.phy0_dual_route = true,
|
|
};
|
|
|
|
static const struct sun4i_usb_phy_cfg sun50i_h6_cfg = {
|
|
.num_phys = 4,
|
|
.type = sun50i_h6_phy,
|
|
.disc_thresh = 3,
|
|
.phyctl_offset = REG_PHYCTL_A33,
|
|
.dedicated_clocks = true,
|
|
.enable_pmu_unk1 = true,
|
|
.phy0_dual_route = true,
|
|
.missing_phys = BIT(1) | BIT(2),
|
|
};
|
|
|
|
static const struct of_device_id sun4i_usb_phy_of_match[] = {
|
|
{ .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg },
|
|
{ .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg },
|
|
{ .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg },
|
|
{ .compatible = "allwinner,sun7i-a20-usb-phy", .data = &sun7i_a20_cfg },
|
|
{ .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },
|
|
{ .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
|
|
{ .compatible = "allwinner,sun8i-a83t-usb-phy", .data = &sun8i_a83t_cfg },
|
|
{ .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
|
|
{ .compatible = "allwinner,sun8i-r40-usb-phy", .data = &sun8i_r40_cfg },
|
|
{ .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg },
|
|
{ .compatible = "allwinner,sun50i-a64-usb-phy",
|
|
.data = &sun50i_a64_cfg},
|
|
{ .compatible = "allwinner,sun50i-h6-usb-phy", .data = &sun50i_h6_cfg },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
|
|
|
|
static struct platform_driver sun4i_usb_phy_driver = {
|
|
.probe = sun4i_usb_phy_probe,
|
|
.remove = sun4i_usb_phy_remove,
|
|
.driver = {
|
|
.of_match_table = sun4i_usb_phy_of_match,
|
|
.name = "sun4i-usb-phy",
|
|
}
|
|
};
|
|
module_platform_driver(sun4i_usb_phy_driver);
|
|
|
|
MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
|
|
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
|
|
MODULE_LICENSE("GPL v2");
|