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6ef72bc036
The Qualcomm PCIe2 PHY is based on design from Synopsys and found in several different platforms where the QMP PHY isn't used. Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
12 lines
630 B
Makefile
12 lines
630 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_PHY_ATH79_USB) += phy-ath79-usb.o
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obj-$(CONFIG_PHY_QCOM_APQ8064_SATA) += phy-qcom-apq8064-sata.o
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obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA) += phy-qcom-ipq806x-sata.o
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obj-$(CONFIG_PHY_QCOM_PCIE2) += phy-qcom-pcie2.o
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obj-$(CONFIG_PHY_QCOM_QMP) += phy-qcom-qmp.o
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obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o
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obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
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obj-$(CONFIG_PHY_QCOM_UFS_14NM) += phy-qcom-ufs-qmp-14nm.o
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obj-$(CONFIG_PHY_QCOM_UFS_20NM) += phy-qcom-ufs-qmp-20nm.o
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obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o
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obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o
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