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a2cd62ec9a
Instead now use ioremap. This is needed for 3.4 since this change
emerged in mainline during one of the previous rc cycles.
These solves the following compilation breaks:
drivers/staging/tidspbridge/core/tiomap3430.c:
In function ‘bridge_brd_start’:
drivers/staging/tidspbridge/core/tiomap3430.c:425:4:
error: implicit declaration of function ‘OMAP2_L4_IO_ADDRESS’
drivers/staging/tidspbridge/core/wdt.c: In function ‘dsp_wdt_init’:
drivers/staging/tidspbridge/core/wdt.c:56:2:
error: implicit declaration of function ‘OMAP2_L4_IO_ADDRESS’
For control registers a new function needs to be defined so we
can get rid of a layer violation, but that approach must be queued
for the next merge window.
As seen in:
http://www.arm.linux.org.uk/developer/build/
platform: omap4430-sdp build: uImage
config: randconfig version: 3.4.0-rc3
start time: Apr 20 2012 01:07
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
134 lines
3 KiB
C
134 lines
3 KiB
C
/*
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* wdt.c
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*
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* DSP-BIOS Bridge driver support functions for TI OMAP processors.
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*
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* IO dispatcher for a shared memory channel driver.
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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*
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* This package is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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*/
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#include <linux/types.h>
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#include <dspbridge/dbdefs.h>
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#include <dspbridge/dspdeh.h>
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#include <dspbridge/dev.h>
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#include <dspbridge/_chnl_sm.h>
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#include <dspbridge/wdt.h>
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#include <dspbridge/host_os.h>
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#define OMAP34XX_WDT3_BASE (L4_PER_34XX_BASE + 0x30000)
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static struct dsp_wdt_setting dsp_wdt;
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void dsp_wdt_dpc(unsigned long data)
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{
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struct deh_mgr *deh_mgr;
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dev_get_deh_mgr(dev_get_first(), &deh_mgr);
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if (deh_mgr)
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bridge_deh_notify(deh_mgr, DSP_WDTOVERFLOW, 0);
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}
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irqreturn_t dsp_wdt_isr(int irq, void *data)
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{
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u32 value;
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/* ack wdt3 interrupt */
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value = __raw_readl(dsp_wdt.reg_base + OMAP3_WDT3_ISR_OFFSET);
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__raw_writel(value, dsp_wdt.reg_base + OMAP3_WDT3_ISR_OFFSET);
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tasklet_schedule(&dsp_wdt.wdt3_tasklet);
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return IRQ_HANDLED;
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}
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int dsp_wdt_init(void)
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{
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int ret = 0;
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dsp_wdt.sm_wdt = NULL;
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dsp_wdt.reg_base = ioremap(OMAP34XX_WDT3_BASE, SZ_4K);
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if (!dsp_wdt.reg_base)
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return -ENOMEM;
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tasklet_init(&dsp_wdt.wdt3_tasklet, dsp_wdt_dpc, 0);
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dsp_wdt.fclk = clk_get(NULL, "wdt3_fck");
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if (dsp_wdt.fclk) {
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dsp_wdt.iclk = clk_get(NULL, "wdt3_ick");
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if (!dsp_wdt.iclk) {
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clk_put(dsp_wdt.fclk);
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dsp_wdt.fclk = NULL;
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ret = -EFAULT;
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}
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} else
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ret = -EFAULT;
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if (!ret)
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ret = request_irq(INT_34XX_WDT3_IRQ, dsp_wdt_isr, 0,
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"dsp_wdt", &dsp_wdt);
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/* Disable at this moment, it will be enabled when DSP starts */
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if (!ret)
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disable_irq(INT_34XX_WDT3_IRQ);
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return ret;
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}
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void dsp_wdt_sm_set(void *data)
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{
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dsp_wdt.sm_wdt = data;
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dsp_wdt.sm_wdt->wdt_overflow = 5; /* in seconds */
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}
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void dsp_wdt_exit(void)
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{
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free_irq(INT_34XX_WDT3_IRQ, &dsp_wdt);
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tasklet_kill(&dsp_wdt.wdt3_tasklet);
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if (dsp_wdt.fclk)
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clk_put(dsp_wdt.fclk);
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if (dsp_wdt.iclk)
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clk_put(dsp_wdt.iclk);
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dsp_wdt.fclk = NULL;
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dsp_wdt.iclk = NULL;
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dsp_wdt.sm_wdt = NULL;
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if (dsp_wdt.reg_base)
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iounmap(dsp_wdt.reg_base);
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dsp_wdt.reg_base = NULL;
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}
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void dsp_wdt_enable(bool enable)
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{
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u32 tmp;
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static bool wdt_enable;
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if (wdt_enable == enable || !dsp_wdt.fclk || !dsp_wdt.iclk)
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return;
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wdt_enable = enable;
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if (enable) {
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clk_enable(dsp_wdt.fclk);
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clk_enable(dsp_wdt.iclk);
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dsp_wdt.sm_wdt->wdt_setclocks = 1;
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tmp = __raw_readl(dsp_wdt.reg_base + OMAP3_WDT3_ISR_OFFSET);
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__raw_writel(tmp, dsp_wdt.reg_base + OMAP3_WDT3_ISR_OFFSET);
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enable_irq(INT_34XX_WDT3_IRQ);
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} else {
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disable_irq(INT_34XX_WDT3_IRQ);
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dsp_wdt.sm_wdt->wdt_setclocks = 0;
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clk_disable(dsp_wdt.iclk);
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clk_disable(dsp_wdt.fclk);
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}
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}
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