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7cef39ddba
Extract some of the most generic TCR defines, so they can be reused by the page table sharing code. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20200918101852.582559-6-jean-philippe@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
30 lines
812 B
C
30 lines
812 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef IO_PGTABLE_ARM_H_
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#define IO_PGTABLE_ARM_H_
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#define ARM_LPAE_TCR_TG0_4K 0
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#define ARM_LPAE_TCR_TG0_64K 1
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#define ARM_LPAE_TCR_TG0_16K 2
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#define ARM_LPAE_TCR_TG1_16K 1
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#define ARM_LPAE_TCR_TG1_4K 2
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#define ARM_LPAE_TCR_TG1_64K 3
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#define ARM_LPAE_TCR_SH_NS 0
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#define ARM_LPAE_TCR_SH_OS 2
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#define ARM_LPAE_TCR_SH_IS 3
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#define ARM_LPAE_TCR_RGN_NC 0
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#define ARM_LPAE_TCR_RGN_WBWA 1
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#define ARM_LPAE_TCR_RGN_WT 2
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#define ARM_LPAE_TCR_RGN_WB 3
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#define ARM_LPAE_TCR_PS_32_BIT 0x0ULL
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#define ARM_LPAE_TCR_PS_36_BIT 0x1ULL
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#define ARM_LPAE_TCR_PS_40_BIT 0x2ULL
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#define ARM_LPAE_TCR_PS_42_BIT 0x3ULL
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#define ARM_LPAE_TCR_PS_44_BIT 0x4ULL
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#define ARM_LPAE_TCR_PS_48_BIT 0x5ULL
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#define ARM_LPAE_TCR_PS_52_BIT 0x6ULL
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#endif /* IO_PGTABLE_ARM_H_ */
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