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![Khiem Nguyen](/assets/img/avatar_default.png)
The new PMIC BD9574MWF inherits features from BD9571MWV. Add the support of new PMIC to existing bd9571mwv driver. Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com> Co-developed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
289 lines
9.2 KiB
C
289 lines
9.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* ROHM BD9571MWV-M and BD9574MVF-M core driver
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*
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* Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
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* Copyright (C) 2020 Renesas Electronics Corporation
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*
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* Based on the TPS65086 driver
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*/
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/rohm-generic.h>
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#include <linux/module.h>
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#include <linux/mfd/bd9571mwv.h>
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static const struct mfd_cell bd9571mwv_cells[] = {
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{ .name = "bd9571mwv-regulator", },
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{ .name = "bd9571mwv-gpio", },
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};
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static const struct regmap_range bd9571mwv_readable_yes_ranges[] = {
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regmap_reg_range(BD9571MWV_VENDOR_CODE, BD9571MWV_PRODUCT_REVISION),
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regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
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regmap_reg_range(BD9571MWV_AVS_SET_MONI, BD9571MWV_AVS_DVFS_VID(3)),
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regmap_reg_range(BD9571MWV_VD18_VID, BD9571MWV_VD33_VID),
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regmap_reg_range(BD9571MWV_DVFS_VINIT, BD9571MWV_DVFS_VINIT),
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regmap_reg_range(BD9571MWV_DVFS_SETVMAX, BD9571MWV_DVFS_MONIVDAC),
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regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
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regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INTMASK),
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regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
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};
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static const struct regmap_access_table bd9571mwv_readable_table = {
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.yes_ranges = bd9571mwv_readable_yes_ranges,
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.n_yes_ranges = ARRAY_SIZE(bd9571mwv_readable_yes_ranges),
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};
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static const struct regmap_range bd9571mwv_writable_yes_ranges[] = {
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regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
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regmap_reg_range(BD9571MWV_AVS_VD09_VID(0), BD9571MWV_AVS_VD09_VID(3)),
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regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_SETVID),
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regmap_reg_range(BD9571MWV_GPIO_DIR, BD9571MWV_GPIO_OUT),
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regmap_reg_range(BD9571MWV_GPIO_INT_SET, BD9571MWV_GPIO_INTMASK),
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regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
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};
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static const struct regmap_access_table bd9571mwv_writable_table = {
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.yes_ranges = bd9571mwv_writable_yes_ranges,
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.n_yes_ranges = ARRAY_SIZE(bd9571mwv_writable_yes_ranges),
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};
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static const struct regmap_range bd9571mwv_volatile_yes_ranges[] = {
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regmap_reg_range(BD9571MWV_DVFS_MONIVDAC, BD9571MWV_DVFS_MONIVDAC),
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regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
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regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INT),
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regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTREQ),
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};
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static const struct regmap_access_table bd9571mwv_volatile_table = {
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.yes_ranges = bd9571mwv_volatile_yes_ranges,
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.n_yes_ranges = ARRAY_SIZE(bd9571mwv_volatile_yes_ranges),
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};
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static const struct regmap_config bd9571mwv_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.cache_type = REGCACHE_RBTREE,
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.rd_table = &bd9571mwv_readable_table,
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.wr_table = &bd9571mwv_writable_table,
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.volatile_table = &bd9571mwv_volatile_table,
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.max_register = 0xff,
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};
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static const struct regmap_irq bd9571mwv_irqs[] = {
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REGMAP_IRQ_REG(BD9571MWV_IRQ_MD1, 0,
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BD9571MWV_INT_INTREQ_MD1_INT),
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REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E1, 0,
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BD9571MWV_INT_INTREQ_MD2_E1_INT),
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REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E2, 0,
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BD9571MWV_INT_INTREQ_MD2_E2_INT),
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REGMAP_IRQ_REG(BD9571MWV_IRQ_PROT_ERR, 0,
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BD9571MWV_INT_INTREQ_PROT_ERR_INT),
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REGMAP_IRQ_REG(BD9571MWV_IRQ_GP, 0,
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BD9571MWV_INT_INTREQ_GP_INT),
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REGMAP_IRQ_REG(BD9571MWV_IRQ_128H_OF, 0,
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BD9571MWV_INT_INTREQ_128H_OF_INT),
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REGMAP_IRQ_REG(BD9571MWV_IRQ_WDT_OF, 0,
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BD9571MWV_INT_INTREQ_WDT_OF_INT),
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REGMAP_IRQ_REG(BD9571MWV_IRQ_BKUP_TRG, 0,
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BD9571MWV_INT_INTREQ_BKUP_TRG_INT),
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};
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static struct regmap_irq_chip bd9571mwv_irq_chip = {
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.name = "bd9571mwv",
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.status_base = BD9571MWV_INT_INTREQ,
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.mask_base = BD9571MWV_INT_INTMASK,
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.ack_base = BD9571MWV_INT_INTREQ,
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.init_ack_masked = true,
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.num_regs = 1,
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.irqs = bd9571mwv_irqs,
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.num_irqs = ARRAY_SIZE(bd9571mwv_irqs),
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};
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static const struct mfd_cell bd9574mwf_cells[] = {
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{ .name = "bd9574mwf-regulator", },
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{ .name = "bd9574mwf-gpio", },
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};
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static const struct regmap_range bd9574mwf_readable_yes_ranges[] = {
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regmap_reg_range(BD9571MWV_VENDOR_CODE, BD9571MWV_PRODUCT_REVISION),
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regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
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regmap_reg_range(BD9571MWV_DVFS_VINIT, BD9571MWV_DVFS_SETVMAX),
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regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_MONIVDAC),
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regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
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regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INTMASK),
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regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
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};
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static const struct regmap_access_table bd9574mwf_readable_table = {
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.yes_ranges = bd9574mwf_readable_yes_ranges,
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.n_yes_ranges = ARRAY_SIZE(bd9574mwf_readable_yes_ranges),
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};
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static const struct regmap_range bd9574mwf_writable_yes_ranges[] = {
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regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
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regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_SETVID),
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regmap_reg_range(BD9571MWV_GPIO_DIR, BD9571MWV_GPIO_OUT),
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regmap_reg_range(BD9571MWV_GPIO_INT_SET, BD9571MWV_GPIO_INTMASK),
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regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
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};
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static const struct regmap_access_table bd9574mwf_writable_table = {
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.yes_ranges = bd9574mwf_writable_yes_ranges,
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.n_yes_ranges = ARRAY_SIZE(bd9574mwf_writable_yes_ranges),
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};
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static const struct regmap_range bd9574mwf_volatile_yes_ranges[] = {
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regmap_reg_range(BD9571MWV_DVFS_MONIVDAC, BD9571MWV_DVFS_MONIVDAC),
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regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
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regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INT),
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regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTREQ),
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};
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static const struct regmap_access_table bd9574mwf_volatile_table = {
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.yes_ranges = bd9574mwf_volatile_yes_ranges,
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.n_yes_ranges = ARRAY_SIZE(bd9574mwf_volatile_yes_ranges),
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};
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static const struct regmap_config bd9574mwf_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.cache_type = REGCACHE_RBTREE,
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.rd_table = &bd9574mwf_readable_table,
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.wr_table = &bd9574mwf_writable_table,
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.volatile_table = &bd9574mwf_volatile_table,
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.max_register = 0xff,
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};
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static struct regmap_irq_chip bd9574mwf_irq_chip = {
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.name = "bd9574mwf",
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.status_base = BD9571MWV_INT_INTREQ,
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.mask_base = BD9571MWV_INT_INTMASK,
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.ack_base = BD9571MWV_INT_INTREQ,
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.init_ack_masked = true,
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.num_regs = 1,
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.irqs = bd9571mwv_irqs,
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.num_irqs = ARRAY_SIZE(bd9571mwv_irqs),
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};
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static int bd957x_identify(struct device *dev, struct regmap *regmap)
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{
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unsigned int value;
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int ret;
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ret = regmap_read(regmap, BD9571MWV_VENDOR_CODE, &value);
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if (ret) {
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dev_err(dev, "Failed to read vendor code register (ret=%i)\n",
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ret);
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return ret;
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}
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if (value != BD9571MWV_VENDOR_CODE_VAL) {
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dev_err(dev, "Invalid vendor code ID %02x (expected %02x)\n",
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value, BD9571MWV_VENDOR_CODE_VAL);
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return -EINVAL;
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}
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ret = regmap_read(regmap, BD9571MWV_PRODUCT_CODE, &value);
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if (ret) {
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dev_err(dev, "Failed to read product code register (ret=%i)\n",
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ret);
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return ret;
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}
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ret = regmap_read(regmap, BD9571MWV_PRODUCT_REVISION, &value);
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if (ret) {
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dev_err(dev, "Failed to read revision register (ret=%i)\n",
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ret);
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return ret;
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}
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return 0;
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}
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static int bd9571mwv_probe(struct i2c_client *client,
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const struct i2c_device_id *ids)
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{
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const struct regmap_config *regmap_config;
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const struct regmap_irq_chip *irq_chip;
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const struct mfd_cell *cells;
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struct device *dev = &client->dev;
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struct regmap *regmap;
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struct regmap_irq_chip_data *irq_data;
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int ret, num_cells, irq = client->irq;
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/* Read the PMIC product code */
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ret = i2c_smbus_read_byte_data(client, BD9571MWV_PRODUCT_CODE);
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if (ret < 0) {
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dev_err(dev, "Failed to read product code\n");
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return ret;
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}
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switch (ret) {
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case BD9571MWV_PRODUCT_CODE_BD9571MWV:
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regmap_config = &bd9571mwv_regmap_config;
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irq_chip = &bd9571mwv_irq_chip;
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cells = bd9571mwv_cells;
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num_cells = ARRAY_SIZE(bd9571mwv_cells);
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break;
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case BD9571MWV_PRODUCT_CODE_BD9574MWF:
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regmap_config = &bd9574mwf_regmap_config;
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irq_chip = &bd9574mwf_irq_chip;
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cells = bd9574mwf_cells;
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num_cells = ARRAY_SIZE(bd9574mwf_cells);
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break;
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default:
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dev_err(dev, "Unsupported device 0x%x\n", ret);
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return -ENODEV;
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}
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regmap = devm_regmap_init_i2c(client, regmap_config);
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if (IS_ERR(regmap)) {
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dev_err(dev, "Failed to initialize register map\n");
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return PTR_ERR(regmap);
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}
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ret = bd957x_identify(dev, regmap);
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if (ret)
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return ret;
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ret = devm_regmap_add_irq_chip(dev, regmap, irq, IRQF_ONESHOT, 0,
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irq_chip, &irq_data);
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if (ret) {
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dev_err(dev, "Failed to register IRQ chip\n");
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return ret;
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}
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return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, cells, num_cells,
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NULL, 0, regmap_irq_get_domain(irq_data));
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}
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static const struct of_device_id bd9571mwv_of_match_table[] = {
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{ .compatible = "rohm,bd9571mwv", },
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{ .compatible = "rohm,bd9574mwf", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, bd9571mwv_of_match_table);
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static const struct i2c_device_id bd9571mwv_id_table[] = {
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{ "bd9571mwv", 0 },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(i2c, bd9571mwv_id_table);
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static struct i2c_driver bd9571mwv_driver = {
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.driver = {
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.name = "bd9571mwv",
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.of_match_table = bd9571mwv_of_match_table,
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},
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.probe = bd9571mwv_probe,
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.id_table = bd9571mwv_id_table,
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};
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module_i2c_driver(bd9571mwv_driver);
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MODULE_AUTHOR("Marek Vasut <marek.vasut+renesas@gmail.com>");
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MODULE_DESCRIPTION("BD9571MWV PMIC Driver");
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MODULE_LICENSE("GPL v2");
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