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![Tony Lindgren](/assets/img/avatar_default.png)
We have started to get a bunch of pointless dmamask not set warnings
that makes the output of dmesg -l err,warn hard to read with many
extra warnings:
cpcap-regulator cpcap-regulator.0: DMA mask not set
cpcap_adc cpcap_adc.0: DMA mask not set
cpcap_battery cpcap_battery.0: DMA mask not set
cpcap-charger cpcap-charger.0: DMA mask not set
cpcap-pwrbutton cpcap-pwrbutton.0: DMA mask not set
cpcap-led cpcap-led.0: DMA mask not set
cpcap-led cpcap-led.1: DMA mask not set
cpcap-led cpcap-led.2: DMA mask not set
cpcap-led cpcap-led.3: DMA mask not set
cpcap-led cpcap-led.4: DMA mask not set
cpcap-rtc cpcap-rtc.0: DMA mask not set
cpcap-usb-phy cpcap-usb-phy.0: DMA mask not set
This seems to have started with commit 4d8bde883b
("OF: Don't set
default coherent DMA mask"). We have the parent SPI controller use
DMA, while CPCAP driver and it's children do not. For audio, the
DMA is handled over I2S bus with the McBSP driver.
Cc: Carl Philipp Klemm <philipp@uvos.xyz>
Cc: Ivan Jelincic <parazyd@dyne.org>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Sicelo A. Mhlongo <absicsz@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
351 lines
8 KiB
C
351 lines
8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Motorola CPCAP PMIC core driver
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*
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* Copyright (C) 2016 Tony Lindgren <tony@atomide.com>
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/sysfs.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/motorola-cpcap.h>
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#include <linux/spi/spi.h>
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#define CPCAP_NR_IRQ_REG_BANKS 6
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#define CPCAP_NR_IRQ_CHIPS 3
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#define CPCAP_REGISTER_SIZE 4
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#define CPCAP_REGISTER_BITS 16
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struct cpcap_ddata {
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struct spi_device *spi;
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struct regmap_irq *irqs;
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struct regmap_irq_chip_data *irqdata[CPCAP_NR_IRQ_CHIPS];
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const struct regmap_config *regmap_conf;
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struct regmap *regmap;
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};
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static int cpcap_sense_irq(struct regmap *regmap, int irq)
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{
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int regnum = irq / CPCAP_REGISTER_BITS;
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int mask = BIT(irq % CPCAP_REGISTER_BITS);
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int reg = CPCAP_REG_INTS1 + (regnum * CPCAP_REGISTER_SIZE);
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int err, val;
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if (reg < CPCAP_REG_INTS1 || reg > CPCAP_REG_INTS4)
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return -EINVAL;
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err = regmap_read(regmap, reg, &val);
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if (err)
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return err;
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return !!(val & mask);
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}
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int cpcap_sense_virq(struct regmap *regmap, int virq)
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{
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struct regmap_irq_chip_data *d = irq_get_chip_data(virq);
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int irq_base = regmap_irq_chip_get_base(d);
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return cpcap_sense_irq(regmap, virq - irq_base);
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}
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EXPORT_SYMBOL_GPL(cpcap_sense_virq);
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static int cpcap_check_revision(struct cpcap_ddata *cpcap)
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{
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u16 vendor, rev;
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int ret;
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ret = cpcap_get_vendor(&cpcap->spi->dev, cpcap->regmap, &vendor);
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if (ret)
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return ret;
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ret = cpcap_get_revision(&cpcap->spi->dev, cpcap->regmap, &rev);
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if (ret)
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return ret;
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dev_info(&cpcap->spi->dev, "CPCAP vendor: %s rev: %i.%i (%x)\n",
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vendor == CPCAP_VENDOR_ST ? "ST" : "TI",
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CPCAP_REVISION_MAJOR(rev), CPCAP_REVISION_MINOR(rev),
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rev);
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if (rev < CPCAP_REVISION_2_1) {
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dev_info(&cpcap->spi->dev,
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"Please add old CPCAP revision support as needed\n");
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return -ENODEV;
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}
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return 0;
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}
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/*
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* First two irq chips are the two private macro interrupt chips, the third
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* irq chip is for register banks 1 - 4 and is available for drivers to use.
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*/
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static struct regmap_irq_chip cpcap_irq_chip[CPCAP_NR_IRQ_CHIPS] = {
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{
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.name = "cpcap-m2",
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.num_regs = 1,
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.status_base = CPCAP_REG_MI1,
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.ack_base = CPCAP_REG_MI1,
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.mask_base = CPCAP_REG_MIM1,
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.use_ack = true,
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.clear_ack = true,
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},
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{
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.name = "cpcap-m2",
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.num_regs = 1,
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.status_base = CPCAP_REG_MI2,
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.ack_base = CPCAP_REG_MI2,
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.mask_base = CPCAP_REG_MIM2,
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.use_ack = true,
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.clear_ack = true,
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},
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{
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.name = "cpcap1-4",
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.num_regs = 4,
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.status_base = CPCAP_REG_INT1,
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.ack_base = CPCAP_REG_INT1,
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.mask_base = CPCAP_REG_INTM1,
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.use_ack = true,
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.clear_ack = true,
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},
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};
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static void cpcap_init_one_regmap_irq(struct cpcap_ddata *cpcap,
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struct regmap_irq *rirq,
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int irq_base, int irq)
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{
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unsigned int reg_offset;
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unsigned int bit, mask;
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reg_offset = irq - irq_base;
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reg_offset /= cpcap->regmap_conf->val_bits;
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reg_offset *= cpcap->regmap_conf->reg_stride;
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bit = irq % cpcap->regmap_conf->val_bits;
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mask = (1 << bit);
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rirq->reg_offset = reg_offset;
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rirq->mask = mask;
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}
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static int cpcap_init_irq_chip(struct cpcap_ddata *cpcap, int irq_chip,
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int irq_start, int nr_irqs)
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{
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struct regmap_irq_chip *chip = &cpcap_irq_chip[irq_chip];
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int i, ret;
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for (i = irq_start; i < irq_start + nr_irqs; i++) {
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struct regmap_irq *rirq = &cpcap->irqs[i];
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cpcap_init_one_regmap_irq(cpcap, rirq, irq_start, i);
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}
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chip->irqs = &cpcap->irqs[irq_start];
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chip->num_irqs = nr_irqs;
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chip->irq_drv_data = cpcap;
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ret = devm_regmap_add_irq_chip(&cpcap->spi->dev, cpcap->regmap,
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cpcap->spi->irq,
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irq_get_trigger_type(cpcap->spi->irq) |
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IRQF_SHARED, -1,
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chip, &cpcap->irqdata[irq_chip]);
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if (ret) {
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dev_err(&cpcap->spi->dev, "could not add irq chip %i: %i\n",
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irq_chip, ret);
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return ret;
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}
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return 0;
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}
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static int cpcap_init_irq(struct cpcap_ddata *cpcap)
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{
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int ret;
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cpcap->irqs = devm_kzalloc(&cpcap->spi->dev,
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array3_size(sizeof(*cpcap->irqs),
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CPCAP_NR_IRQ_REG_BANKS,
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cpcap->regmap_conf->val_bits),
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GFP_KERNEL);
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if (!cpcap->irqs)
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return -ENOMEM;
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ret = cpcap_init_irq_chip(cpcap, 0, 0, 16);
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if (ret)
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return ret;
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ret = cpcap_init_irq_chip(cpcap, 1, 16, 16);
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if (ret)
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return ret;
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ret = cpcap_init_irq_chip(cpcap, 2, 32, 64);
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if (ret)
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return ret;
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enable_irq_wake(cpcap->spi->irq);
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return 0;
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}
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static const struct of_device_id cpcap_of_match[] = {
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{ .compatible = "motorola,cpcap", },
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{ .compatible = "st,6556002", },
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{},
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};
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MODULE_DEVICE_TABLE(of, cpcap_of_match);
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static const struct regmap_config cpcap_regmap_config = {
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.reg_bits = 16,
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.reg_stride = 4,
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.pad_bits = 0,
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.val_bits = 16,
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.write_flag_mask = 0x8000,
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.max_register = CPCAP_REG_ST_TEST2,
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.cache_type = REGCACHE_NONE,
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.reg_format_endian = REGMAP_ENDIAN_LITTLE,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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};
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#ifdef CONFIG_PM_SLEEP
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static int cpcap_suspend(struct device *dev)
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{
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struct spi_device *spi = to_spi_device(dev);
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disable_irq(spi->irq);
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return 0;
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}
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static int cpcap_resume(struct device *dev)
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{
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struct spi_device *spi = to_spi_device(dev);
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enable_irq(spi->irq);
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return 0;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(cpcap_pm, cpcap_suspend, cpcap_resume);
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static const struct mfd_cell cpcap_mfd_devices[] = {
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{
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.name = "cpcap_adc",
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.of_compatible = "motorola,mapphone-cpcap-adc",
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}, {
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.name = "cpcap_battery",
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.of_compatible = "motorola,cpcap-battery",
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}, {
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.name = "cpcap-charger",
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.of_compatible = "motorola,mapphone-cpcap-charger",
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}, {
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.name = "cpcap-regulator",
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.of_compatible = "motorola,mapphone-cpcap-regulator",
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}, {
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.name = "cpcap-rtc",
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.of_compatible = "motorola,cpcap-rtc",
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}, {
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.name = "cpcap-pwrbutton",
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.of_compatible = "motorola,cpcap-pwrbutton",
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}, {
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.name = "cpcap-usb-phy",
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.of_compatible = "motorola,mapphone-cpcap-usb-phy",
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}, {
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.name = "cpcap-led",
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.id = 0,
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.of_compatible = "motorola,cpcap-led-red",
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}, {
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.name = "cpcap-led",
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.id = 1,
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.of_compatible = "motorola,cpcap-led-green",
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}, {
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.name = "cpcap-led",
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.id = 2,
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.of_compatible = "motorola,cpcap-led-blue",
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}, {
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.name = "cpcap-led",
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.id = 3,
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.of_compatible = "motorola,cpcap-led-adl",
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}, {
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.name = "cpcap-led",
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.id = 4,
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.of_compatible = "motorola,cpcap-led-cp",
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}, {
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.name = "cpcap-codec",
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}
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};
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static int cpcap_probe(struct spi_device *spi)
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{
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const struct of_device_id *match;
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struct cpcap_ddata *cpcap;
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int ret;
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match = of_match_device(of_match_ptr(cpcap_of_match), &spi->dev);
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if (!match)
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return -ENODEV;
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cpcap = devm_kzalloc(&spi->dev, sizeof(*cpcap), GFP_KERNEL);
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if (!cpcap)
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return -ENOMEM;
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cpcap->spi = spi;
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spi_set_drvdata(spi, cpcap);
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spi->bits_per_word = 16;
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spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
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ret = spi_setup(spi);
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if (ret)
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return ret;
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cpcap->regmap_conf = &cpcap_regmap_config;
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cpcap->regmap = devm_regmap_init_spi(spi, &cpcap_regmap_config);
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if (IS_ERR(cpcap->regmap)) {
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ret = PTR_ERR(cpcap->regmap);
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dev_err(&cpcap->spi->dev, "Failed to initialize regmap: %d\n",
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ret);
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return ret;
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}
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ret = cpcap_check_revision(cpcap);
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if (ret) {
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dev_err(&cpcap->spi->dev, "Failed to detect CPCAP: %i\n", ret);
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return ret;
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}
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ret = cpcap_init_irq(cpcap);
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if (ret)
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return ret;
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/* Parent SPI controller uses DMA, CPCAP and child devices do not */
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spi->dev.coherent_dma_mask = 0;
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spi->dev.dma_mask = &spi->dev.coherent_dma_mask;
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return devm_mfd_add_devices(&spi->dev, 0, cpcap_mfd_devices,
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ARRAY_SIZE(cpcap_mfd_devices), NULL, 0, NULL);
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}
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static struct spi_driver cpcap_driver = {
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.driver = {
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.name = "cpcap-core",
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.of_match_table = cpcap_of_match,
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.pm = &cpcap_pm,
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},
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.probe = cpcap_probe,
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};
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module_spi_driver(cpcap_driver);
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MODULE_ALIAS("platform:cpcap");
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MODULE_DESCRIPTION("CPCAP driver");
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MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
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MODULE_LICENSE("GPL v2");
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