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![Álvaro Fernández Rojas](/assets/img/avatar_default.png)
bcm7038_wdt can be used on bmips big endian (bcm63xx) devices too. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20210223080042.29569-1-noltari@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
235 lines
5.5 KiB
C
235 lines
5.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Broadcom Corporation
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*
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*/
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#include <linux/clk.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/watchdog.h>
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#define WDT_START_1 0xff00
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#define WDT_START_2 0x00ff
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#define WDT_STOP_1 0xee00
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#define WDT_STOP_2 0x00ee
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#define WDT_TIMEOUT_REG 0x0
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#define WDT_CMD_REG 0x4
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#define WDT_MIN_TIMEOUT 1 /* seconds */
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#define WDT_DEFAULT_TIMEOUT 30 /* seconds */
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#define WDT_DEFAULT_RATE 27000000
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struct bcm7038_watchdog {
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void __iomem *base;
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struct watchdog_device wdd;
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u32 rate;
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struct clk *clk;
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};
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static inline void bcm7038_wdt_write(u32 value, void __iomem *addr)
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{
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/* MIPS chips strapped for BE will automagically configure the
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* peripheral registers for CPU-native byte order.
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*/
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if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
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__raw_writel(value, addr);
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else
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writel_relaxed(value, addr);
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}
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static inline u32 bcm7038_wdt_read(void __iomem *addr)
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{
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if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
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return __raw_readl(addr);
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else
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return readl_relaxed(addr);
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}
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static void bcm7038_wdt_set_timeout_reg(struct watchdog_device *wdog)
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{
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struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
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u32 timeout;
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timeout = wdt->rate * wdog->timeout;
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bcm7038_wdt_write(timeout, wdt->base + WDT_TIMEOUT_REG);
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}
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static int bcm7038_wdt_ping(struct watchdog_device *wdog)
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{
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struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
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bcm7038_wdt_write(WDT_START_1, wdt->base + WDT_CMD_REG);
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bcm7038_wdt_write(WDT_START_2, wdt->base + WDT_CMD_REG);
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return 0;
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}
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static int bcm7038_wdt_start(struct watchdog_device *wdog)
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{
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bcm7038_wdt_set_timeout_reg(wdog);
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bcm7038_wdt_ping(wdog);
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return 0;
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}
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static int bcm7038_wdt_stop(struct watchdog_device *wdog)
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{
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struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
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bcm7038_wdt_write(WDT_STOP_1, wdt->base + WDT_CMD_REG);
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bcm7038_wdt_write(WDT_STOP_2, wdt->base + WDT_CMD_REG);
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return 0;
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}
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static int bcm7038_wdt_set_timeout(struct watchdog_device *wdog,
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unsigned int t)
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{
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/* Can't modify timeout value if watchdog timer is running */
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bcm7038_wdt_stop(wdog);
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wdog->timeout = t;
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bcm7038_wdt_start(wdog);
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return 0;
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}
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static unsigned int bcm7038_wdt_get_timeleft(struct watchdog_device *wdog)
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{
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struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
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u32 time_left;
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time_left = bcm7038_wdt_read(wdt->base + WDT_CMD_REG);
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return time_left / wdt->rate;
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}
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static const struct watchdog_info bcm7038_wdt_info = {
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.identity = "Broadcom BCM7038 Watchdog Timer",
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE
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};
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static const struct watchdog_ops bcm7038_wdt_ops = {
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.owner = THIS_MODULE,
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.start = bcm7038_wdt_start,
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.stop = bcm7038_wdt_stop,
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.set_timeout = bcm7038_wdt_set_timeout,
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.get_timeleft = bcm7038_wdt_get_timeleft,
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};
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static void bcm7038_clk_disable_unprepare(void *data)
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{
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clk_disable_unprepare(data);
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}
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static int bcm7038_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct bcm7038_watchdog *wdt;
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int err;
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wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
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if (!wdt)
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return -ENOMEM;
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platform_set_drvdata(pdev, wdt);
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wdt->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(wdt->base))
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return PTR_ERR(wdt->base);
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wdt->clk = devm_clk_get(dev, NULL);
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/* If unable to get clock, use default frequency */
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if (!IS_ERR(wdt->clk)) {
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err = clk_prepare_enable(wdt->clk);
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if (err)
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return err;
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err = devm_add_action_or_reset(dev,
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bcm7038_clk_disable_unprepare,
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wdt->clk);
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if (err)
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return err;
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wdt->rate = clk_get_rate(wdt->clk);
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/* Prevent divide-by-zero exception */
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if (!wdt->rate)
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wdt->rate = WDT_DEFAULT_RATE;
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} else {
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wdt->rate = WDT_DEFAULT_RATE;
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wdt->clk = NULL;
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}
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wdt->wdd.info = &bcm7038_wdt_info;
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wdt->wdd.ops = &bcm7038_wdt_ops;
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wdt->wdd.min_timeout = WDT_MIN_TIMEOUT;
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wdt->wdd.timeout = WDT_DEFAULT_TIMEOUT;
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wdt->wdd.max_timeout = 0xffffffff / wdt->rate;
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wdt->wdd.parent = dev;
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watchdog_set_drvdata(&wdt->wdd, wdt);
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watchdog_stop_on_reboot(&wdt->wdd);
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watchdog_stop_on_unregister(&wdt->wdd);
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err = devm_watchdog_register_device(dev, &wdt->wdd);
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if (err)
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return err;
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dev_info(dev, "Registered BCM7038 Watchdog\n");
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int bcm7038_wdt_suspend(struct device *dev)
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{
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struct bcm7038_watchdog *wdt = dev_get_drvdata(dev);
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if (watchdog_active(&wdt->wdd))
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return bcm7038_wdt_stop(&wdt->wdd);
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return 0;
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}
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static int bcm7038_wdt_resume(struct device *dev)
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{
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struct bcm7038_watchdog *wdt = dev_get_drvdata(dev);
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if (watchdog_active(&wdt->wdd))
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return bcm7038_wdt_start(&wdt->wdd);
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return 0;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(bcm7038_wdt_pm_ops, bcm7038_wdt_suspend,
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bcm7038_wdt_resume);
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static const struct of_device_id bcm7038_wdt_match[] = {
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{ .compatible = "brcm,bcm7038-wdt" },
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{},
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};
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MODULE_DEVICE_TABLE(of, bcm7038_wdt_match);
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static struct platform_driver bcm7038_wdt_driver = {
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.probe = bcm7038_wdt_probe,
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.driver = {
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.name = "bcm7038-wdt",
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.of_match_table = bcm7038_wdt_match,
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.pm = &bcm7038_wdt_pm_ops,
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}
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};
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module_platform_driver(bcm7038_wdt_driver);
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Driver for Broadcom 7038 SoCs Watchdog");
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MODULE_AUTHOR("Justin Chen");
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