579 lines
15 KiB
C
579 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2016 MediaTek Inc.
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* Author: PC Chen <pc.chen@mediatek.com>
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* Tiffany Lin <tiffany.lin@mediatek.com>
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*/
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#include <linux/bitfield.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <media/v4l2-event.h>
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#include <media/v4l2-mem2mem.h>
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#include <media/videobuf2-dma-contig.h>
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#include <media/v4l2-device.h>
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#include "mtk_vcodec_dec.h"
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#include "mtk_vcodec_dec_hw.h"
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#include "mtk_vcodec_dec_pm.h"
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#include "../common/mtk_vcodec_intr.h"
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static int mtk_vcodec_get_hw_count(struct mtk_vcodec_dec_ctx *ctx, struct mtk_vcodec_dec_dev *dev)
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{
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switch (dev->vdec_pdata->hw_arch) {
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case MTK_VDEC_PURE_SINGLE_CORE:
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return MTK_VDEC_ONE_CORE;
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case MTK_VDEC_LAT_SINGLE_CORE:
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return MTK_VDEC_ONE_LAT_ONE_CORE;
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default:
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mtk_v4l2_vdec_err(ctx, "hw arch %d not supported", dev->vdec_pdata->hw_arch);
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return MTK_VDEC_NO_HW;
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}
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}
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static bool mtk_vcodec_is_hw_active(struct mtk_vcodec_dec_dev *dev)
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{
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u32 cg_status;
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if (dev->vdecsys_regmap)
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return !regmap_test_bits(dev->vdecsys_regmap, VDEC_HW_ACTIVE_ADDR,
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VDEC_HW_ACTIVE_MASK);
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cg_status = readl(dev->reg_base[VDEC_SYS] + VDEC_HW_ACTIVE_ADDR);
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return !FIELD_GET(VDEC_HW_ACTIVE_MASK, cg_status);
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}
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static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv)
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{
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struct mtk_vcodec_dec_dev *dev = priv;
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struct mtk_vcodec_dec_ctx *ctx;
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unsigned int dec_done_status = 0;
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void __iomem *vdec_misc_addr = dev->reg_base[VDEC_MISC] +
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VDEC_IRQ_CFG_REG;
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ctx = mtk_vcodec_get_curr_ctx(dev, MTK_VDEC_CORE);
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if (!mtk_vcodec_is_hw_active(dev)) {
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mtk_v4l2_vdec_err(ctx, "DEC ISR, VDEC active is not 0x0");
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return IRQ_HANDLED;
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}
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dec_done_status = readl(vdec_misc_addr);
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ctx->irq_status = dec_done_status;
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if ((dec_done_status & MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) !=
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MTK_VDEC_IRQ_STATUS_DEC_SUCCESS)
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return IRQ_HANDLED;
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/* clear interrupt */
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writel((readl(vdec_misc_addr) | VDEC_IRQ_CFG),
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dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG);
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writel((readl(vdec_misc_addr) & ~VDEC_IRQ_CLR),
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dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG);
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wake_up_dec_ctx(ctx, MTK_INST_IRQ_RECEIVED, 0);
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mtk_v4l2_vdec_dbg(3, ctx, "wake up ctx %d, dec_done_status=%x", ctx->id, dec_done_status);
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return IRQ_HANDLED;
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}
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static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dec_dev *dev)
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{
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struct platform_device *pdev = dev->plat_dev;
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int reg_num, i;
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struct resource *res;
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bool has_vdecsys_reg;
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int num_max_vdec_regs;
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static const char * const mtk_dec_reg_names[] = {
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"misc",
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"ld",
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"top",
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"cm",
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"ad",
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"av",
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"pp",
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"hwd",
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"hwq",
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"hwb",
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"hwg"
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};
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/*
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* If we have reg-names in devicetree, this means that we're on a new
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* register organization, which implies that the VDEC_SYS iospace gets
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* R/W through a syscon (regmap).
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* Here we try to get the "misc" iostart only to check if we have reg-names
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*/
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "misc");
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if (res)
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has_vdecsys_reg = false;
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else
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has_vdecsys_reg = true;
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num_max_vdec_regs = has_vdecsys_reg ? NUM_MAX_VDEC_REG_BASE :
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ARRAY_SIZE(mtk_dec_reg_names);
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/* Sizeof(u32) * 4 bytes for each register base. */
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reg_num = of_property_count_elems_of_size(pdev->dev.of_node, "reg",
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sizeof(u32) * 4);
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if (reg_num <= 0 || reg_num > num_max_vdec_regs) {
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dev_err(&pdev->dev, "Invalid register property size: %d\n", reg_num);
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return -EINVAL;
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}
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if (has_vdecsys_reg) {
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for (i = 0; i < reg_num; i++) {
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dev->reg_base[i] = devm_platform_ioremap_resource(pdev, i);
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if (IS_ERR(dev->reg_base[i]))
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return PTR_ERR(dev->reg_base[i]);
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dev_dbg(&pdev->dev, "reg[%d] base=%p", i, dev->reg_base[i]);
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}
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} else {
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for (i = 0; i < reg_num; i++) {
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dev->reg_base[i+1] = devm_platform_ioremap_resource_byname(pdev, mtk_dec_reg_names[i]);
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if (IS_ERR(dev->reg_base[i+1]))
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return PTR_ERR(dev->reg_base[i+1]);
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dev_dbg(&pdev->dev, "reg[%d] base=%p", i + 1, dev->reg_base[i + 1]);
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}
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dev->vdecsys_regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
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"mediatek,vdecsys");
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if (IS_ERR(dev->vdecsys_regmap)) {
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dev_err(&pdev->dev, "Missing mediatek,vdecsys property");
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return PTR_ERR(dev->vdecsys_regmap);
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}
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}
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return 0;
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}
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static int mtk_vcodec_init_dec_resources(struct mtk_vcodec_dec_dev *dev)
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{
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struct platform_device *pdev = dev->plat_dev;
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int ret;
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ret = mtk_vcodec_get_reg_bases(dev);
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if (ret)
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return ret;
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if (dev->vdec_pdata->is_subdev_supported)
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return 0;
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dev->dec_irq = platform_get_irq(pdev, 0);
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if (dev->dec_irq < 0)
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return dev->dec_irq;
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irq_set_status_flags(dev->dec_irq, IRQ_NOAUTOEN);
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ret = devm_request_irq(&pdev->dev, dev->dec_irq,
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mtk_vcodec_dec_irq_handler, 0, pdev->name, dev);
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if (ret) {
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dev_err(&pdev->dev, "failed to install dev->dec_irq %d (%d)",
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dev->dec_irq, ret);
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return ret;
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}
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ret = mtk_vcodec_init_dec_clk(pdev, &dev->pm);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to get mt vcodec clock source");
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return ret;
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}
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pm_runtime_enable(&pdev->dev);
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return 0;
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}
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static int fops_vcodec_open(struct file *file)
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{
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struct mtk_vcodec_dec_dev *dev = video_drvdata(file);
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struct mtk_vcodec_dec_ctx *ctx = NULL;
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int ret = 0, i, hw_count;
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struct vb2_queue *src_vq;
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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mutex_lock(&dev->dev_mutex);
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ctx->id = dev->id_counter++;
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v4l2_fh_init(&ctx->fh, video_devdata(file));
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file->private_data = &ctx->fh;
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v4l2_fh_add(&ctx->fh);
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INIT_LIST_HEAD(&ctx->list);
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ctx->dev = dev;
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if (ctx->dev->vdec_pdata->is_subdev_supported) {
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hw_count = mtk_vcodec_get_hw_count(ctx, dev);
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if (!hw_count || !dev->subdev_prob_done) {
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ret = -EINVAL;
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goto err_ctrls_setup;
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}
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ret = dev->subdev_prob_done(dev);
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if (ret)
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goto err_ctrls_setup;
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for (i = 0; i < hw_count; i++)
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init_waitqueue_head(&ctx->queue[i]);
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} else {
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init_waitqueue_head(&ctx->queue[0]);
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}
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mutex_init(&ctx->lock);
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ctx->type = MTK_INST_DECODER;
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ret = dev->vdec_pdata->ctrls_setup(ctx);
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if (ret) {
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mtk_v4l2_vdec_err(ctx, "Failed to setup mt vcodec controls");
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goto err_ctrls_setup;
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}
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ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev_dec, ctx,
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&mtk_vcodec_dec_queue_init);
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if (IS_ERR((__force void *)ctx->m2m_ctx)) {
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ret = PTR_ERR((__force void *)ctx->m2m_ctx);
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mtk_v4l2_vdec_err(ctx, "Failed to v4l2_m2m_ctx_init() (%d)", ret);
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goto err_m2m_ctx_init;
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}
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src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx,
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V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE);
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ctx->empty_flush_buf.vb.vb2_buf.vb2_queue = src_vq;
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mtk_vcodec_dec_set_default_params(ctx);
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if (v4l2_fh_is_singular(&ctx->fh)) {
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/*
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* Does nothing if firmware was already loaded.
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*/
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ret = mtk_vcodec_fw_load_firmware(dev->fw_handler);
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if (ret < 0) {
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/*
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* Return 0 if downloading firmware successfully,
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* otherwise it is failed
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*/
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mtk_v4l2_vdec_err(ctx, "failed to load firmware!");
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goto err_load_fw;
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}
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dev->dec_capability =
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mtk_vcodec_fw_get_vdec_capa(dev->fw_handler);
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mtk_v4l2_vdec_dbg(0, ctx, "decoder capability %x", dev->dec_capability);
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}
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ctx->dev->vdec_pdata->init_vdec_params(ctx);
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mutex_lock(&dev->dev_ctx_lock);
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list_add(&ctx->list, &dev->ctx_list);
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mutex_unlock(&dev->dev_ctx_lock);
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mtk_vcodec_dbgfs_create(ctx);
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mutex_unlock(&dev->dev_mutex);
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mtk_v4l2_vdec_dbg(0, ctx, "%s decoder [%d]", dev_name(&dev->plat_dev->dev), ctx->id);
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return ret;
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/* Deinit when failure occurred */
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err_load_fw:
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v4l2_m2m_ctx_release(ctx->m2m_ctx);
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err_m2m_ctx_init:
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v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
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err_ctrls_setup:
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v4l2_fh_del(&ctx->fh);
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v4l2_fh_exit(&ctx->fh);
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kfree(ctx);
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mutex_unlock(&dev->dev_mutex);
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return ret;
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}
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static int fops_vcodec_release(struct file *file)
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{
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struct mtk_vcodec_dec_dev *dev = video_drvdata(file);
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struct mtk_vcodec_dec_ctx *ctx = fh_to_dec_ctx(file->private_data);
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mtk_v4l2_vdec_dbg(0, ctx, "[%d] decoder", ctx->id);
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mutex_lock(&dev->dev_mutex);
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/*
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* Call v4l2_m2m_ctx_release before mtk_vcodec_dec_release. First, it
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* makes sure the worker thread is not running after vdec_if_deinit.
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* Second, the decoder will be flushed and all the buffers will be
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* returned in stop_streaming.
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*/
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v4l2_m2m_ctx_release(ctx->m2m_ctx);
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mtk_vcodec_dec_release(ctx);
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v4l2_fh_del(&ctx->fh);
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v4l2_fh_exit(&ctx->fh);
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v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
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mtk_vcodec_dbgfs_remove(dev, ctx->id);
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mutex_lock(&dev->dev_ctx_lock);
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list_del_init(&ctx->list);
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mutex_unlock(&dev->dev_ctx_lock);
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kfree(ctx);
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mutex_unlock(&dev->dev_mutex);
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return 0;
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}
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static const struct v4l2_file_operations mtk_vcodec_fops = {
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.owner = THIS_MODULE,
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.open = fops_vcodec_open,
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.release = fops_vcodec_release,
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.poll = v4l2_m2m_fop_poll,
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.unlocked_ioctl = video_ioctl2,
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.mmap = v4l2_m2m_fop_mmap,
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};
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static int mtk_vcodec_probe(struct platform_device *pdev)
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{
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struct mtk_vcodec_dec_dev *dev;
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struct video_device *vfd_dec;
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phandle rproc_phandle;
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enum mtk_vcodec_fw_type fw_type;
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int i, ret;
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dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
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if (!dev)
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return -ENOMEM;
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INIT_LIST_HEAD(&dev->ctx_list);
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dev->plat_dev = pdev;
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dev->vdec_pdata = of_device_get_match_data(&pdev->dev);
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if (!of_property_read_u32(pdev->dev.of_node, "mediatek,vpu",
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&rproc_phandle)) {
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fw_type = VPU;
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} else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,scp",
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&rproc_phandle)) {
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fw_type = SCP;
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} else {
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dev_dbg(&pdev->dev, "Could not get vdec IPI device");
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return -ENODEV;
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}
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dma_set_max_seg_size(&pdev->dev, UINT_MAX);
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dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, DECODER);
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if (IS_ERR(dev->fw_handler))
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return PTR_ERR(dev->fw_handler);
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ret = mtk_vcodec_init_dec_resources(dev);
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if (ret) {
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dev_err(&pdev->dev, "Failed to init dec resources");
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goto err_dec_pm;
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}
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if (IS_VDEC_LAT_ARCH(dev->vdec_pdata->hw_arch)) {
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dev->core_workqueue =
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alloc_ordered_workqueue("core-decoder",
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WQ_MEM_RECLAIM | WQ_FREEZABLE);
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if (!dev->core_workqueue) {
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dev_dbg(&pdev->dev, "Failed to create core workqueue");
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ret = -EINVAL;
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goto err_res;
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}
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}
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for (i = 0; i < MTK_VDEC_HW_MAX; i++)
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mutex_init(&dev->dec_mutex[i]);
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mutex_init(&dev->dev_mutex);
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mutex_init(&dev->dev_ctx_lock);
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spin_lock_init(&dev->irqlock);
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snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), "%s",
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"[/MTK_V4L2_VDEC]");
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ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
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if (ret) {
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dev_err(&pdev->dev, "v4l2_device_register err=%d", ret);
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goto err_core_workq;
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}
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vfd_dec = video_device_alloc();
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if (!vfd_dec) {
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dev_err(&pdev->dev, "Failed to allocate video device");
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ret = -ENOMEM;
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goto err_dec_alloc;
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}
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vfd_dec->fops = &mtk_vcodec_fops;
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vfd_dec->ioctl_ops = &mtk_vdec_ioctl_ops;
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vfd_dec->release = video_device_release;
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vfd_dec->lock = &dev->dev_mutex;
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vfd_dec->v4l2_dev = &dev->v4l2_dev;
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vfd_dec->vfl_dir = VFL_DIR_M2M;
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vfd_dec->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE |
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V4L2_CAP_STREAMING;
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snprintf(vfd_dec->name, sizeof(vfd_dec->name), "%s",
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MTK_VCODEC_DEC_NAME);
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video_set_drvdata(vfd_dec, dev);
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dev->vfd_dec = vfd_dec;
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platform_set_drvdata(pdev, dev);
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dev->m2m_dev_dec = v4l2_m2m_init(&mtk_vdec_m2m_ops);
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if (IS_ERR((__force void *)dev->m2m_dev_dec)) {
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dev_err(&pdev->dev, "Failed to init mem2mem dec device");
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ret = PTR_ERR((__force void *)dev->m2m_dev_dec);
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goto err_dec_alloc;
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}
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dev->decode_workqueue =
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alloc_ordered_workqueue(MTK_VCODEC_DEC_NAME,
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WQ_MEM_RECLAIM | WQ_FREEZABLE);
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if (!dev->decode_workqueue) {
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dev_err(&pdev->dev, "Failed to create decode workqueue");
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ret = -EINVAL;
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goto err_event_workq;
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}
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if (dev->vdec_pdata->is_subdev_supported) {
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ret = of_platform_populate(pdev->dev.of_node, NULL, NULL,
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&pdev->dev);
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if (ret) {
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dev_err(&pdev->dev, "Main device of_platform_populate failed.");
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goto err_reg_cont;
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}
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} else {
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set_bit(MTK_VDEC_CORE, dev->subdev_bitmap);
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}
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atomic_set(&dev->dec_active_cnt, 0);
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memset(dev->vdec_racing_info, 0, sizeof(dev->vdec_racing_info));
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mutex_init(&dev->dec_racing_info_mutex);
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|
ret = video_register_device(vfd_dec, VFL_TYPE_VIDEO, -1);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to register video device");
|
|
goto err_reg_cont;
|
|
}
|
|
|
|
if (dev->vdec_pdata->uses_stateless_api) {
|
|
v4l2_disable_ioctl(vfd_dec, VIDIOC_DECODER_CMD);
|
|
v4l2_disable_ioctl(vfd_dec, VIDIOC_TRY_DECODER_CMD);
|
|
|
|
dev->mdev_dec.dev = &pdev->dev;
|
|
strscpy(dev->mdev_dec.model, MTK_VCODEC_DEC_NAME,
|
|
sizeof(dev->mdev_dec.model));
|
|
|
|
media_device_init(&dev->mdev_dec);
|
|
dev->mdev_dec.ops = &mtk_vcodec_media_ops;
|
|
dev->v4l2_dev.mdev = &dev->mdev_dec;
|
|
|
|
ret = v4l2_m2m_register_media_controller(dev->m2m_dev_dec, dev->vfd_dec,
|
|
MEDIA_ENT_F_PROC_VIDEO_DECODER);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to register media controller");
|
|
goto err_dec_mem_init;
|
|
}
|
|
|
|
ret = media_device_register(&dev->mdev_dec);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to register media device");
|
|
goto err_media_reg;
|
|
}
|
|
|
|
dev_dbg(&pdev->dev, "media registered as /dev/media%d", vfd_dec->minor);
|
|
}
|
|
|
|
mtk_vcodec_dbgfs_init(dev, false);
|
|
dev_dbg(&pdev->dev, "decoder registered as /dev/video%d", vfd_dec->minor);
|
|
|
|
return 0;
|
|
|
|
err_media_reg:
|
|
v4l2_m2m_unregister_media_controller(dev->m2m_dev_dec);
|
|
err_dec_mem_init:
|
|
video_unregister_device(vfd_dec);
|
|
err_reg_cont:
|
|
if (dev->vdec_pdata->uses_stateless_api)
|
|
media_device_cleanup(&dev->mdev_dec);
|
|
destroy_workqueue(dev->decode_workqueue);
|
|
err_event_workq:
|
|
v4l2_m2m_release(dev->m2m_dev_dec);
|
|
err_dec_alloc:
|
|
v4l2_device_unregister(&dev->v4l2_dev);
|
|
err_core_workq:
|
|
if (IS_VDEC_LAT_ARCH(dev->vdec_pdata->hw_arch))
|
|
destroy_workqueue(dev->core_workqueue);
|
|
err_res:
|
|
if (!dev->vdec_pdata->is_subdev_supported)
|
|
pm_runtime_disable(dev->pm.dev);
|
|
err_dec_pm:
|
|
mtk_vcodec_fw_release(dev->fw_handler);
|
|
return ret;
|
|
}
|
|
|
|
static const struct of_device_id mtk_vcodec_match[] = {
|
|
{
|
|
.compatible = "mediatek,mt8173-vcodec-dec",
|
|
.data = &mtk_vdec_8173_pdata,
|
|
},
|
|
{
|
|
.compatible = "mediatek,mt8183-vcodec-dec",
|
|
.data = &mtk_vdec_8183_pdata,
|
|
},
|
|
{
|
|
.compatible = "mediatek,mt8192-vcodec-dec",
|
|
.data = &mtk_lat_sig_core_pdata,
|
|
},
|
|
{
|
|
.compatible = "mediatek,mt8186-vcodec-dec",
|
|
.data = &mtk_vdec_single_core_pdata,
|
|
},
|
|
{
|
|
.compatible = "mediatek,mt8195-vcodec-dec",
|
|
.data = &mtk_lat_sig_core_pdata,
|
|
},
|
|
{
|
|
.compatible = "mediatek,mt8188-vcodec-dec",
|
|
.data = &mtk_lat_sig_core_pdata,
|
|
},
|
|
{},
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, mtk_vcodec_match);
|
|
|
|
static void mtk_vcodec_dec_remove(struct platform_device *pdev)
|
|
{
|
|
struct mtk_vcodec_dec_dev *dev = platform_get_drvdata(pdev);
|
|
|
|
destroy_workqueue(dev->decode_workqueue);
|
|
|
|
if (media_devnode_is_registered(dev->mdev_dec.devnode)) {
|
|
media_device_unregister(&dev->mdev_dec);
|
|
v4l2_m2m_unregister_media_controller(dev->m2m_dev_dec);
|
|
media_device_cleanup(&dev->mdev_dec);
|
|
}
|
|
|
|
if (dev->m2m_dev_dec)
|
|
v4l2_m2m_release(dev->m2m_dev_dec);
|
|
|
|
if (dev->vfd_dec)
|
|
video_unregister_device(dev->vfd_dec);
|
|
|
|
mtk_vcodec_dbgfs_deinit(&dev->dbgfs);
|
|
v4l2_device_unregister(&dev->v4l2_dev);
|
|
if (!dev->vdec_pdata->is_subdev_supported)
|
|
pm_runtime_disable(dev->pm.dev);
|
|
mtk_vcodec_fw_release(dev->fw_handler);
|
|
}
|
|
|
|
static struct platform_driver mtk_vcodec_dec_driver = {
|
|
.probe = mtk_vcodec_probe,
|
|
.remove_new = mtk_vcodec_dec_remove,
|
|
.driver = {
|
|
.name = MTK_VCODEC_DEC_NAME,
|
|
.of_match_table = mtk_vcodec_match,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(mtk_vcodec_dec_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("Mediatek video codec V4L2 decoder driver");
|