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edcb5cf84f
Xen's paravirt patch function xen_patch() does some special casing for irq_ops functions to apply relocations when those functions can be patched inline instead of calls. Unfortunately none of the special case function replacements is small enough to be patched inline, so the special case never applies. As xen_patch() will call paravirt_patch_default() in all cases it can be just dropped. xen-asm.h doesn't seem necessary without xen_patch() as the only thing left in it would be the definition of XEN_EFLAGS_NMI used only once. So move that definition and remove xen-asm.h. Signed-off-by: Juergen Gross <jgross@suse.com> Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: boris.ostrovsky@oracle.com Cc: lguest@lists.ozlabs.org Cc: rusty@rustcorp.com.au Cc: xen-devel@lists.xenproject.org Link: http://lkml.kernel.org/r/20170816173157.8633-2-jgross@suse.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
136 lines
3.1 KiB
ArmAsm
136 lines
3.1 KiB
ArmAsm
/*
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* Asm versions of Xen pv-ops, suitable for direct use.
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*
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* We only bother with direct forms (ie, vcpu in percpu data) of the
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* operations here; the indirect forms are better handled in C.
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*/
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#include <asm/asm-offsets.h>
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#include <asm/percpu.h>
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#include <asm/processor-flags.h>
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#include <asm/frame.h>
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#include <linux/linkage.h>
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/*
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* Enable events. This clears the event mask and tests the pending
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* event status with one and operation. If there are pending events,
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* then enter the hypervisor to get them handled.
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*/
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ENTRY(xen_irq_enable_direct)
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FRAME_BEGIN
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/* Unmask events */
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movb $0, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
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/*
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* Preempt here doesn't matter because that will deal with any
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* pending interrupts. The pending check may end up being run
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* on the wrong CPU, but that doesn't hurt.
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*/
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/* Test for pending */
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testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
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jz 1f
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call check_events
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1:
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FRAME_END
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ret
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ENDPROC(xen_irq_enable_direct)
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/*
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* Disabling events is simply a matter of making the event mask
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* non-zero.
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*/
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ENTRY(xen_irq_disable_direct)
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movb $1, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
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ret
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ENDPROC(xen_irq_disable_direct)
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/*
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* (xen_)save_fl is used to get the current interrupt enable status.
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* Callers expect the status to be in X86_EFLAGS_IF, and other bits
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* may be set in the return value. We take advantage of this by
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* making sure that X86_EFLAGS_IF has the right value (and other bits
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* in that byte are 0), but other bits in the return value are
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* undefined. We need to toggle the state of the bit, because Xen and
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* x86 use opposite senses (mask vs enable).
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*/
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ENTRY(xen_save_fl_direct)
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testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
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setz %ah
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addb %ah, %ah
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ret
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ENDPROC(xen_save_fl_direct)
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/*
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* In principle the caller should be passing us a value return from
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* xen_save_fl_direct, but for robustness sake we test only the
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* X86_EFLAGS_IF flag rather than the whole byte. After setting the
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* interrupt mask state, it checks for unmasked pending events and
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* enters the hypervisor to get them delivered if so.
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*/
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ENTRY(xen_restore_fl_direct)
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FRAME_BEGIN
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#ifdef CONFIG_X86_64
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testw $X86_EFLAGS_IF, %di
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#else
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testb $X86_EFLAGS_IF>>8, %ah
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#endif
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setz PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
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/*
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* Preempt here doesn't matter because that will deal with any
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* pending interrupts. The pending check may end up being run
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* on the wrong CPU, but that doesn't hurt.
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*/
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/* check for unmasked and pending */
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cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
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jnz 1f
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call check_events
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1:
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FRAME_END
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ret
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ENDPROC(xen_restore_fl_direct)
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/*
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* Force an event check by making a hypercall, but preserve regs
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* before making the call.
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*/
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ENTRY(check_events)
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FRAME_BEGIN
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#ifdef CONFIG_X86_32
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push %eax
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push %ecx
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push %edx
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call xen_force_evtchn_callback
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pop %edx
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pop %ecx
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pop %eax
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#else
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push %rax
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push %rcx
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push %rdx
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push %rsi
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push %rdi
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push %r8
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push %r9
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push %r10
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push %r11
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call xen_force_evtchn_callback
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pop %r11
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pop %r10
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pop %r9
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pop %r8
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pop %rdi
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pop %rsi
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pop %rdx
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pop %rcx
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pop %rax
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#endif
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FRAME_END
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ret
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ENDPROC(check_events)
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