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cc16d664e2
Add hwspinlock support for the CSR atlas7 SoC. The Hardware Spinlock device on atlas7 provides hardware assistance for synchronization between the multiple processors in the system (dual Cortex-A7, CAN bus Cortex-M3 and audio DSP). Reviewed-by: Suman Anna <s-anna@ti.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Wei Chen <wei.chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
56 lines
1.4 KiB
Text
56 lines
1.4 KiB
Text
#
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# Generic HWSPINLOCK framework
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#
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# HWSPINLOCK always gets selected by whoever wants it.
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config HWSPINLOCK
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tristate
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menu "Hardware Spinlock drivers"
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config HWSPINLOCK_OMAP
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tristate "OMAP Hardware Spinlock device"
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depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX
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select HWSPINLOCK
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help
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Say y here to support the OMAP Hardware Spinlock device (firstly
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introduced in OMAP4).
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If unsure, say N.
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config HWSPINLOCK_QCOM
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tristate "Qualcomm Hardware Spinlock device"
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depends on ARCH_QCOM
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select HWSPINLOCK
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select MFD_SYSCON
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help
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Say y here to support the Qualcomm Hardware Mutex functionality, which
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provides a synchronisation mechanism for the various processors on
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the SoC.
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If unsure, say N.
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config HWSPINLOCK_SIRF
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tristate "SIRF Hardware Spinlock device"
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depends on ARCH_SIRF
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select HWSPINLOCK
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help
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Say y here to support the SIRF Hardware Spinlock device, which
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provides a synchronisation mechanism for the various processors
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on the SoC.
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It's safe to say n here if you're not interested in SIRF hardware
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spinlock or just want a bare minimum kernel.
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config HSEM_U8500
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tristate "STE Hardware Semaphore functionality"
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depends on ARCH_U8500
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select HWSPINLOCK
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help
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Say y here to support the STE Hardware Semaphore functionality, which
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provides a synchronisation mechanism for the various processor on the
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SoC.
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If unsure, say N.
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endmenu
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