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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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bef4a0ab98
patches, both new drivers and fixes to existing. A high percentage of these are for Samsung platforms like Exynos. Core framework fixes and some new features like automagical clock re-parenting round out the patches. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJSLkImAAoJEDqPOy9afJhJOjsP/Ri26AW7XB9pPWJRSU9REBZA 31wxcFo2T+PNir9duwDwjFBFycC3MisaKFlg7D134M+7txbYqm1TRvfu9OEDxpSP 4b/Yl6TarN4dhCN2R+BREO8PnxCBVpspDcsdh6Esuwuet2xUom3UtN8yvSjhPP/u qGNmXQYXyQy4fom5r+GsDVW+HIhLkaX9b0fYc9EN/bqfgv94PMZAxAxsK9CroAGZ 0m0g9ZXw9iSvVfz+iQEqPINtvpTLHk0FGyimoSR7kvW4o4o47tVtLEWp7VjG6mr5 zvBsycaQq6NgxPu96iUWWhsO9Uj2I7/7JgidXF7r+wvEFs1mcgZtkkirSA/n4zUN C8a87rvQrZRLr+xXhVuqiVHCgCY8vXoHqkWg6SrZ62ORL8C7uYRpog5SEe2ZzLJX l5uGAsDM6el+Uc/YviCPoZbeFr3h3CQvvFo8+i2eN0v/Phf30rq4lotBvpQj894G ngEIMj+D8wshdYSF2dNJ0rLnkLHTgCbiA28L6Cl5TRzRMj3Uaj9aT3cmoLUnimZu 7F7nWU4Iu/vzQKCTQ+eTvwxXJqIlE0JeVbJilqH1f2a68JdXP1LOId+2w/CP8gqQ i2odj6JHMgBzM9rNs+y0Ir9X/bXIVi6F341c19Nl15srEiLLl8xQIpcPDaI/Kvzs pefYgF2yS5AZAW3ac90r =5GfA -----END PGP SIGNATURE----- Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux Pull clock framework changes from Michael Turquette: "The common clk framework changes for 3.12 are dominated by clock driver patches, both new drivers and fixes to existing. A high percentage of these are for Samsung platforms like Exynos. Core framework fixes and some new features like automagical clock re-parenting round out the patches" * tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux: (102 commits) clk: only call get_parent if there is one clk: samsung: exynos5250: Simplify registration of PLL rate tables clk: samsung: exynos4: Register PLL rate tables for Exynos4x12 clk: samsung: exynos4: Register PLL rate tables for Exynos4210 clk: samsung: exynos4: Reorder registration of mout_vpllsrc clk: samsung: pll: Add support for rate configuration of PLL46xx clk: samsung: pll: Use new registration method for PLL46xx clk: samsung: pll: Add support for rate configuration of PLL45xx clk: samsung: pll: Use new registration method for PLL45xx clk: samsung: exynos4: Rename exynos4_plls to exynos4x12_plls clk: samsung: exynos4: Remove checks for DT node clk: samsung: exynos4: Remove unused static clkdev aliases clk: samsung: Modify _get_rate() helper to use __clk_lookup() clk: samsung: exynos4: Use separate aliases for cpufreq related clocks clocksource: samsung_pwm_timer: Get clock from device tree ARM: dts: exynos4: Specify PWM clocks in PWM node pwm: samsung: Update DT bindings documentation to cover clocks clk: Move symbol export to proper location clk: fix new_parent dereference before null check clk: wm831x: Initialise wm831x pointer on init ...
509 lines
12 KiB
Text
509 lines
12 KiB
Text
/*
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* Samsung's Exynos4 SoC series common device tree source
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*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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* Copyright (c) 2010-2011 Linaro Ltd.
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* www.linaro.org
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*
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* Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
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* SoCs from Exynos4 series can include this file and provide values for SoCs
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* specfic bindings.
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*
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* Note: This file does not include device nodes for all the controllers in
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* Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
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* nodes can be added to this file.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "skeleton.dtsi"
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/ {
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interrupt-parent = <&gic>;
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aliases {
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spi0 = &spi_0;
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spi1 = &spi_1;
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spi2 = &spi_2;
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i2c0 = &i2c_0;
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i2c1 = &i2c_1;
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i2c2 = &i2c_2;
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i2c3 = &i2c_3;
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i2c4 = &i2c_4;
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i2c5 = &i2c_5;
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i2c6 = &i2c_6;
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i2c7 = &i2c_7;
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csis0 = &csis_0;
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csis1 = &csis_1;
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fimc0 = &fimc_0;
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fimc1 = &fimc_1;
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fimc2 = &fimc_2;
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fimc3 = &fimc_3;
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};
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chipid@10000000 {
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compatible = "samsung,exynos4210-chipid";
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reg = <0x10000000 0x100>;
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};
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pd_mfc: mfc-power-domain@10023C40 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C40 0x20>;
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};
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pd_g3d: g3d-power-domain@10023C60 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C60 0x20>;
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};
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pd_lcd0: lcd0-power-domain@10023C80 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C80 0x20>;
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};
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pd_tv: tv-power-domain@10023C20 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C20 0x20>;
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};
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pd_cam: cam-power-domain@10023C00 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C00 0x20>;
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};
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pd_gps: gps-power-domain@10023CE0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023CE0 0x20>;
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};
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gic:interrupt-controller@10490000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x10490000 0x1000>, <0x10480000 0x100>;
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};
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combiner:interrupt-controller@10440000 {
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compatible = "samsung,exynos4210-combiner";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0x10440000 0x1000>;
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};
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sys_reg: sysreg {
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compatible = "samsung,exynos4-sysreg", "syscon";
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reg = <0x10010000 0x400>;
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};
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camera {
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compatible = "samsung,fimc", "simple-bus";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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clock_cam: clock-controller {
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#clock-cells = <1>;
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};
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fimc_0: fimc@11800000 {
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compatible = "samsung,exynos4210-fimc";
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reg = <0x11800000 0x1000>;
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interrupts = <0 84 0>;
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clocks = <&clock 256>, <&clock 128>;
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clock-names = "fimc", "sclk_fimc";
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samsung,power-domain = <&pd_cam>;
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samsung,sysreg = <&sys_reg>;
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status = "disabled";
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};
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fimc_1: fimc@11810000 {
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compatible = "samsung,exynos4210-fimc";
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reg = <0x11810000 0x1000>;
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interrupts = <0 85 0>;
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clocks = <&clock 257>, <&clock 129>;
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clock-names = "fimc", "sclk_fimc";
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samsung,power-domain = <&pd_cam>;
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samsung,sysreg = <&sys_reg>;
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status = "disabled";
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};
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fimc_2: fimc@11820000 {
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compatible = "samsung,exynos4210-fimc";
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reg = <0x11820000 0x1000>;
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interrupts = <0 86 0>;
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clocks = <&clock 258>, <&clock 130>;
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clock-names = "fimc", "sclk_fimc";
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samsung,power-domain = <&pd_cam>;
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samsung,sysreg = <&sys_reg>;
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status = "disabled";
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};
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fimc_3: fimc@11830000 {
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compatible = "samsung,exynos4210-fimc";
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reg = <0x11830000 0x1000>;
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interrupts = <0 87 0>;
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clocks = <&clock 259>, <&clock 131>;
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clock-names = "fimc", "sclk_fimc";
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samsung,power-domain = <&pd_cam>;
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samsung,sysreg = <&sys_reg>;
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status = "disabled";
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};
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csis_0: csis@11880000 {
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compatible = "samsung,exynos4210-csis";
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reg = <0x11880000 0x4000>;
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interrupts = <0 78 0>;
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clocks = <&clock 260>, <&clock 134>;
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clock-names = "csis", "sclk_csis";
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bus-width = <4>;
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samsung,power-domain = <&pd_cam>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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csis_1: csis@11890000 {
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compatible = "samsung,exynos4210-csis";
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reg = <0x11890000 0x4000>;
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interrupts = <0 80 0>;
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clocks = <&clock 261>, <&clock 135>;
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clock-names = "csis", "sclk_csis";
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bus-width = <2>;
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samsung,power-domain = <&pd_cam>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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watchdog@10060000 {
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compatible = "samsung,s3c2410-wdt";
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reg = <0x10060000 0x100>;
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interrupts = <0 43 0>;
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clocks = <&clock 345>;
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clock-names = "watchdog";
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status = "disabled";
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};
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rtc@10070000 {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x10070000 0x100>;
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interrupts = <0 44 0>, <0 45 0>;
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clocks = <&clock 346>;
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clock-names = "rtc";
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status = "disabled";
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};
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keypad@100A0000 {
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compatible = "samsung,s5pv210-keypad";
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reg = <0x100A0000 0x100>;
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interrupts = <0 109 0>;
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clocks = <&clock 347>;
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clock-names = "keypad";
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status = "disabled";
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};
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sdhci@12510000 {
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compatible = "samsung,exynos4210-sdhci";
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reg = <0x12510000 0x100>;
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interrupts = <0 73 0>;
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clocks = <&clock 297>, <&clock 145>;
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clock-names = "hsmmc", "mmc_busclk.2";
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status = "disabled";
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};
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sdhci@12520000 {
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compatible = "samsung,exynos4210-sdhci";
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reg = <0x12520000 0x100>;
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interrupts = <0 74 0>;
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clocks = <&clock 298>, <&clock 146>;
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clock-names = "hsmmc", "mmc_busclk.2";
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status = "disabled";
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};
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sdhci@12530000 {
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compatible = "samsung,exynos4210-sdhci";
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reg = <0x12530000 0x100>;
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interrupts = <0 75 0>;
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clocks = <&clock 299>, <&clock 147>;
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clock-names = "hsmmc", "mmc_busclk.2";
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status = "disabled";
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};
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sdhci@12540000 {
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compatible = "samsung,exynos4210-sdhci";
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reg = <0x12540000 0x100>;
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interrupts = <0 76 0>;
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clocks = <&clock 300>, <&clock 148>;
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clock-names = "hsmmc", "mmc_busclk.2";
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status = "disabled";
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};
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ehci@12580000 {
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compatible = "samsung,exynos4210-ehci";
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reg = <0x12580000 0x100>;
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interrupts = <0 70 0>;
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clocks = <&clock 304>;
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clock-names = "usbhost";
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status = "disabled";
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};
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ohci@12590000 {
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compatible = "samsung,exynos4210-ohci";
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reg = <0x12590000 0x100>;
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interrupts = <0 70 0>;
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clocks = <&clock 304>;
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clock-names = "usbhost";
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status = "disabled";
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};
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mfc: codec@13400000 {
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compatible = "samsung,mfc-v5";
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reg = <0x13400000 0x10000>;
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interrupts = <0 94 0>;
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samsung,power-domain = <&pd_mfc>;
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clocks = <&clock 273>;
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clock-names = "mfc";
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status = "disabled";
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};
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serial@13800000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13800000 0x100>;
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interrupts = <0 52 0>;
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clocks = <&clock 312>, <&clock 151>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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serial@13810000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13810000 0x100>;
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interrupts = <0 53 0>;
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clocks = <&clock 313>, <&clock 152>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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serial@13820000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13820000 0x100>;
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interrupts = <0 54 0>;
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clocks = <&clock 314>, <&clock 153>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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serial@13830000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13830000 0x100>;
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interrupts = <0 55 0>;
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clocks = <&clock 315>, <&clock 154>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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i2c_0: i2c@13860000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13860000 0x100>;
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interrupts = <0 58 0>;
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clocks = <&clock 317>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
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status = "disabled";
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};
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i2c_1: i2c@13870000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13870000 0x100>;
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interrupts = <0 59 0>;
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clocks = <&clock 318>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_bus>;
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status = "disabled";
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};
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i2c_2: i2c@13880000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13880000 0x100>;
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interrupts = <0 60 0>;
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clocks = <&clock 319>;
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clock-names = "i2c";
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status = "disabled";
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};
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i2c_3: i2c@13890000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13890000 0x100>;
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interrupts = <0 61 0>;
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clocks = <&clock 320>;
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clock-names = "i2c";
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status = "disabled";
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};
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i2c_4: i2c@138A0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138A0000 0x100>;
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interrupts = <0 62 0>;
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clocks = <&clock 321>;
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clock-names = "i2c";
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status = "disabled";
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};
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i2c_5: i2c@138B0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138B0000 0x100>;
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interrupts = <0 63 0>;
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clocks = <&clock 322>;
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clock-names = "i2c";
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status = "disabled";
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};
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i2c_6: i2c@138C0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138C0000 0x100>;
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interrupts = <0 64 0>;
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clocks = <&clock 323>;
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clock-names = "i2c";
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status = "disabled";
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};
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i2c_7: i2c@138D0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138D0000 0x100>;
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interrupts = <0 65 0>;
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clocks = <&clock 324>;
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clock-names = "i2c";
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status = "disabled";
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};
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spi_0: spi@13920000 {
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compatible = "samsung,exynos4210-spi";
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reg = <0x13920000 0x100>;
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interrupts = <0 66 0>;
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dmas = <&pdma0 7>, <&pdma0 6>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 327>, <&clock 159>;
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clock-names = "spi", "spi_busclk0";
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_bus>;
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status = "disabled";
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};
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spi_1: spi@13930000 {
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compatible = "samsung,exynos4210-spi";
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reg = <0x13930000 0x100>;
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interrupts = <0 67 0>;
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dmas = <&pdma1 7>, <&pdma1 6>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 328>, <&clock 160>;
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clock-names = "spi", "spi_busclk0";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi1_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_2: spi@13940000 {
|
|
compatible = "samsung,exynos4210-spi";
|
|
reg = <0x13940000 0x100>;
|
|
interrupts = <0 68 0>;
|
|
dmas = <&pdma0 9>, <&pdma0 8>;
|
|
dma-names = "tx", "rx";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&clock 329>, <&clock 161>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi2_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pwm@139D0000 {
|
|
compatible = "samsung,exynos4210-pwm";
|
|
reg = <0x139D0000 0x1000>;
|
|
interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
|
|
clocks = <&clock 336>;
|
|
clock-names = "timers";
|
|
#pwm-cells = <2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
amba {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "arm,amba-bus";
|
|
interrupt-parent = <&gic>;
|
|
ranges;
|
|
|
|
pdma0: pdma@12680000 {
|
|
compatible = "arm,pl330", "arm,primecell";
|
|
reg = <0x12680000 0x1000>;
|
|
interrupts = <0 35 0>;
|
|
clocks = <&clock 292>;
|
|
clock-names = "apb_pclk";
|
|
#dma-cells = <1>;
|
|
#dma-channels = <8>;
|
|
#dma-requests = <32>;
|
|
};
|
|
|
|
pdma1: pdma@12690000 {
|
|
compatible = "arm,pl330", "arm,primecell";
|
|
reg = <0x12690000 0x1000>;
|
|
interrupts = <0 36 0>;
|
|
clocks = <&clock 293>;
|
|
clock-names = "apb_pclk";
|
|
#dma-cells = <1>;
|
|
#dma-channels = <8>;
|
|
#dma-requests = <32>;
|
|
};
|
|
|
|
mdma1: mdma@12850000 {
|
|
compatible = "arm,pl330", "arm,primecell";
|
|
reg = <0x12850000 0x1000>;
|
|
interrupts = <0 34 0>;
|
|
clocks = <&clock 279>;
|
|
clock-names = "apb_pclk";
|
|
#dma-cells = <1>;
|
|
#dma-channels = <8>;
|
|
#dma-requests = <1>;
|
|
};
|
|
};
|
|
|
|
fimd: fimd@11c00000 {
|
|
compatible = "samsung,exynos4210-fimd";
|
|
interrupt-parent = <&combiner>;
|
|
reg = <0x11c00000 0x20000>;
|
|
interrupt-names = "fifo", "vsync", "lcd_sys";
|
|
interrupts = <11 0>, <11 1>, <11 2>;
|
|
clocks = <&clock 140>, <&clock 283>;
|
|
clock-names = "sclk_fimd", "fimd";
|
|
samsung,power-domain = <&pd_lcd0>;
|
|
status = "disabled";
|
|
};
|
|
};
|