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77899d5320
Moves the properties of DP controller to exynos5.dtsi which are common across exynos5 SoCs like Exynos5250 and Exynos5420. The PHY DP Node is based on Jingoo Han's <jg1.han@samsung.com> patch at https://patchwork.linuxtv.org/patch/19189/ Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
130 lines
3.1 KiB
Text
130 lines
3.1 KiB
Text
/*
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* Samsung's Exynos5 SoC series common device tree source
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*
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* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
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* SoCs from Exynos5 series can include this file and provide values for SoCs
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* specfic bindings.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "skeleton.dtsi"
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/ {
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interrupt-parent = <&gic>;
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chipid@10000000 {
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compatible = "samsung,exynos4210-chipid";
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reg = <0x10000000 0x100>;
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};
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combiner:interrupt-controller@10440000 {
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compatible = "samsung,exynos4210-combiner";
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#interrupt-cells = <2>;
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interrupt-controller;
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samsung,combiner-nr = <32>;
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reg = <0x10440000 0x1000>;
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interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
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<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
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<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
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<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
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<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
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<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
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<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
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<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
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};
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gic:interrupt-controller@10481000 {
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compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x10481000 0x1000>,
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<0x10482000 0x1000>,
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<0x10484000 0x2000>,
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<0x10486000 0x2000>;
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interrupts = <1 9 0xf04>;
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};
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dwmmc_0: dwmmc0@12200000 {
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compatible = "samsung,exynos5250-dw-mshc";
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interrupts = <0 75 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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dwmmc_1: dwmmc1@12210000 {
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compatible = "samsung,exynos5250-dw-mshc";
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interrupts = <0 76 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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dwmmc_2: dwmmc2@12220000 {
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compatible = "samsung,exynos5250-dw-mshc";
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interrupts = <0 77 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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serial@12C00000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C00000 0x100>;
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interrupts = <0 51 0>;
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};
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serial@12C10000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C10000 0x100>;
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interrupts = <0 52 0>;
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};
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serial@12C20000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C20000 0x100>;
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interrupts = <0 53 0>;
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};
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serial@12C30000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C30000 0x100>;
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interrupts = <0 54 0>;
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};
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rtc {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x101E0000 0x100>;
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interrupts = <0 43 0>, <0 44 0>;
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status = "disabled";
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};
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watchdog {
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compatible = "samsung,s3c2410-wdt";
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reg = <0x101D0000 0x100>;
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interrupts = <0 42 0>;
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status = "disabled";
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};
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fimd@14400000 {
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compatible = "samsung,exynos5250-fimd";
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interrupt-parent = <&combiner>;
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reg = <0x14400000 0x40000>;
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interrupt-names = "fifo", "vsync", "lcd_sys";
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interrupts = <18 4>, <18 5>, <18 6>;
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status = "disabled";
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};
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dp-controller@145B0000 {
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compatible = "samsung,exynos5-dp";
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reg = <0x145B0000 0x1000>;
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interrupts = <10 3>;
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interrupt-parent = <&combiner>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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