Trek cc376abf17 drm/amdgpu: Check for valid number of registers to read ... [ Upstream commit 73d8e6c7b8 ] Do not try to allocate any amount of memory requested by the user. Instead limit it to 128 registers. Actually the longest series of consecutive allowed registers are 48, mmGB_TILE_MODE0-31 and mmGB_MACROTILE_MODE0-15 (0x2644-0x2673). Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111273 Signed-off-by: Trek <trek00@inbox.ru> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2019-10-11 18:18:40 +02:00
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drm	drm/amdgpu: Check for valid number of registers to read	2019-10-11 18:18:40 +02:00
host1x
ipu-v3	gpu: ipu-v3: ipu-ic: Fix saturation bit offset in TPMEM	2019-07-31 07:28:41 +02:00
vga
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