mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-11-01 17:08:10 +00:00
e9c195aaee
Pointer alg points to sub field of tmpl, it
is dereferenced after tmpl is freed. Fix
this by accessing alg before free tmpl.
Fixes: ec8f5d8f
("crypto: qce - Qualcomm crypto engine driver")
Signed-off-by: Chengfeng Ye <cyeaa@connect.ust.hk>
Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
529 lines
14 KiB
C
529 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
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*/
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <crypto/aes.h>
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#include <crypto/internal/des.h>
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#include <crypto/internal/skcipher.h>
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#include "cipher.h"
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static unsigned int aes_sw_max_len = CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN;
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module_param(aes_sw_max_len, uint, 0644);
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MODULE_PARM_DESC(aes_sw_max_len,
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"Only use hardware for AES requests larger than this "
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"[0=always use hardware; anything <16 breaks AES-GCM; default="
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__stringify(CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN)"]");
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static LIST_HEAD(skcipher_algs);
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static void qce_skcipher_done(void *data)
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{
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struct crypto_async_request *async_req = data;
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struct skcipher_request *req = skcipher_request_cast(async_req);
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struct qce_cipher_reqctx *rctx = skcipher_request_ctx(req);
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struct qce_alg_template *tmpl = to_cipher_tmpl(crypto_skcipher_reqtfm(req));
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struct qce_device *qce = tmpl->qce;
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struct qce_result_dump *result_buf = qce->dma.result_buf;
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enum dma_data_direction dir_src, dir_dst;
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u32 status;
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int error;
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bool diff_dst;
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diff_dst = (req->src != req->dst) ? true : false;
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dir_src = diff_dst ? DMA_TO_DEVICE : DMA_BIDIRECTIONAL;
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dir_dst = diff_dst ? DMA_FROM_DEVICE : DMA_BIDIRECTIONAL;
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error = qce_dma_terminate_all(&qce->dma);
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if (error)
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dev_dbg(qce->dev, "skcipher dma termination error (%d)\n",
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error);
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if (diff_dst)
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dma_unmap_sg(qce->dev, rctx->src_sg, rctx->src_nents, dir_src);
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dma_unmap_sg(qce->dev, rctx->dst_sg, rctx->dst_nents, dir_dst);
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sg_free_table(&rctx->dst_tbl);
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error = qce_check_status(qce, &status);
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if (error < 0)
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dev_dbg(qce->dev, "skcipher operation error (%x)\n", status);
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memcpy(rctx->iv, result_buf->encr_cntr_iv, rctx->ivsize);
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qce->async_req_done(tmpl->qce, error);
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}
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static int
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qce_skcipher_async_req_handle(struct crypto_async_request *async_req)
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{
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struct skcipher_request *req = skcipher_request_cast(async_req);
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struct qce_cipher_reqctx *rctx = skcipher_request_ctx(req);
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struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
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struct qce_alg_template *tmpl = to_cipher_tmpl(crypto_skcipher_reqtfm(req));
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struct qce_device *qce = tmpl->qce;
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enum dma_data_direction dir_src, dir_dst;
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struct scatterlist *sg;
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bool diff_dst;
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gfp_t gfp;
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int dst_nents, src_nents, ret;
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rctx->iv = req->iv;
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rctx->ivsize = crypto_skcipher_ivsize(skcipher);
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rctx->cryptlen = req->cryptlen;
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diff_dst = (req->src != req->dst) ? true : false;
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dir_src = diff_dst ? DMA_TO_DEVICE : DMA_BIDIRECTIONAL;
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dir_dst = diff_dst ? DMA_FROM_DEVICE : DMA_BIDIRECTIONAL;
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rctx->src_nents = sg_nents_for_len(req->src, req->cryptlen);
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if (diff_dst)
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rctx->dst_nents = sg_nents_for_len(req->dst, req->cryptlen);
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else
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rctx->dst_nents = rctx->src_nents;
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if (rctx->src_nents < 0) {
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dev_err(qce->dev, "Invalid numbers of src SG.\n");
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return rctx->src_nents;
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}
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if (rctx->dst_nents < 0) {
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dev_err(qce->dev, "Invalid numbers of dst SG.\n");
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return -rctx->dst_nents;
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}
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rctx->dst_nents += 1;
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gfp = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ?
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GFP_KERNEL : GFP_ATOMIC;
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ret = sg_alloc_table(&rctx->dst_tbl, rctx->dst_nents, gfp);
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if (ret)
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return ret;
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sg_init_one(&rctx->result_sg, qce->dma.result_buf, QCE_RESULT_BUF_SZ);
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sg = qce_sgtable_add(&rctx->dst_tbl, req->dst, req->cryptlen);
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if (IS_ERR(sg)) {
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ret = PTR_ERR(sg);
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goto error_free;
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}
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sg = qce_sgtable_add(&rctx->dst_tbl, &rctx->result_sg,
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QCE_RESULT_BUF_SZ);
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if (IS_ERR(sg)) {
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ret = PTR_ERR(sg);
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goto error_free;
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}
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sg_mark_end(sg);
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rctx->dst_sg = rctx->dst_tbl.sgl;
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dst_nents = dma_map_sg(qce->dev, rctx->dst_sg, rctx->dst_nents, dir_dst);
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if (dst_nents < 0) {
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ret = dst_nents;
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goto error_free;
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}
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if (diff_dst) {
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src_nents = dma_map_sg(qce->dev, req->src, rctx->src_nents, dir_src);
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if (src_nents < 0) {
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ret = src_nents;
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goto error_unmap_dst;
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}
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rctx->src_sg = req->src;
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} else {
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rctx->src_sg = rctx->dst_sg;
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src_nents = dst_nents - 1;
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}
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ret = qce_dma_prep_sgs(&qce->dma, rctx->src_sg, src_nents,
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rctx->dst_sg, dst_nents,
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qce_skcipher_done, async_req);
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if (ret)
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goto error_unmap_src;
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qce_dma_issue_pending(&qce->dma);
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ret = qce_start(async_req, tmpl->crypto_alg_type);
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if (ret)
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goto error_terminate;
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return 0;
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error_terminate:
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qce_dma_terminate_all(&qce->dma);
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error_unmap_src:
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if (diff_dst)
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dma_unmap_sg(qce->dev, req->src, rctx->src_nents, dir_src);
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error_unmap_dst:
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dma_unmap_sg(qce->dev, rctx->dst_sg, rctx->dst_nents, dir_dst);
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error_free:
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sg_free_table(&rctx->dst_tbl);
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return ret;
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}
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static int qce_skcipher_setkey(struct crypto_skcipher *ablk, const u8 *key,
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unsigned int keylen)
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{
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struct crypto_tfm *tfm = crypto_skcipher_tfm(ablk);
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struct qce_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
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unsigned long flags = to_cipher_tmpl(ablk)->alg_flags;
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unsigned int __keylen;
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int ret;
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if (!key || !keylen)
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return -EINVAL;
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/*
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* AES XTS key1 = key2 not supported by crypto engine.
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* Revisit to request a fallback cipher in this case.
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*/
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if (IS_XTS(flags)) {
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__keylen = keylen >> 1;
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if (!memcmp(key, key + __keylen, __keylen))
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return -ENOKEY;
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} else {
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__keylen = keylen;
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}
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switch (__keylen) {
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case AES_KEYSIZE_128:
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case AES_KEYSIZE_256:
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memcpy(ctx->enc_key, key, keylen);
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break;
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case AES_KEYSIZE_192:
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break;
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default:
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return -EINVAL;
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}
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ret = crypto_skcipher_setkey(ctx->fallback, key, keylen);
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if (!ret)
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ctx->enc_keylen = keylen;
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return ret;
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}
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static int qce_des_setkey(struct crypto_skcipher *ablk, const u8 *key,
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unsigned int keylen)
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{
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struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(ablk);
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int err;
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err = verify_skcipher_des_key(ablk, key);
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if (err)
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return err;
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ctx->enc_keylen = keylen;
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memcpy(ctx->enc_key, key, keylen);
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return 0;
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}
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static int qce_des3_setkey(struct crypto_skcipher *ablk, const u8 *key,
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unsigned int keylen)
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{
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struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(ablk);
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u32 _key[6];
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int err;
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err = verify_skcipher_des3_key(ablk, key);
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if (err)
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return err;
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/*
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* The crypto engine does not support any two keys
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* being the same for triple des algorithms. The
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* verify_skcipher_des3_key does not check for all the
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* below conditions. Return -ENOKEY in case any two keys
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* are the same. Revisit to see if a fallback cipher
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* is needed to handle this condition.
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*/
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memcpy(_key, key, DES3_EDE_KEY_SIZE);
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if (!((_key[0] ^ _key[2]) | (_key[1] ^ _key[3])) ||
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!((_key[2] ^ _key[4]) | (_key[3] ^ _key[5])) ||
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!((_key[0] ^ _key[4]) | (_key[1] ^ _key[5])))
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return -ENOKEY;
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ctx->enc_keylen = keylen;
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memcpy(ctx->enc_key, key, keylen);
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return 0;
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}
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static int qce_skcipher_crypt(struct skcipher_request *req, int encrypt)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
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struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
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struct qce_cipher_reqctx *rctx = skcipher_request_ctx(req);
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struct qce_alg_template *tmpl = to_cipher_tmpl(tfm);
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unsigned int blocksize = crypto_skcipher_blocksize(tfm);
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int keylen;
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int ret;
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rctx->flags = tmpl->alg_flags;
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rctx->flags |= encrypt ? QCE_ENCRYPT : QCE_DECRYPT;
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keylen = IS_XTS(rctx->flags) ? ctx->enc_keylen >> 1 : ctx->enc_keylen;
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/* CE does not handle 0 length messages */
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if (!req->cryptlen)
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return 0;
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/*
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* ECB and CBC algorithms require message lengths to be
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* multiples of block size.
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*/
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if (IS_ECB(rctx->flags) || IS_CBC(rctx->flags))
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if (!IS_ALIGNED(req->cryptlen, blocksize))
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return -EINVAL;
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/*
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* Conditions for requesting a fallback cipher
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* AES-192 (not supported by crypto engine (CE))
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* AES-XTS request with len <= 512 byte (not recommended to use CE)
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* AES-XTS request with len > QCE_SECTOR_SIZE and
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* is not a multiple of it.(Revisit this condition to check if it is
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* needed in all versions of CE)
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*/
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if (IS_AES(rctx->flags) &&
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((keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_256) ||
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(IS_XTS(rctx->flags) && ((req->cryptlen <= aes_sw_max_len) ||
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(req->cryptlen > QCE_SECTOR_SIZE &&
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req->cryptlen % QCE_SECTOR_SIZE))))) {
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skcipher_request_set_tfm(&rctx->fallback_req, ctx->fallback);
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skcipher_request_set_callback(&rctx->fallback_req,
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req->base.flags,
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req->base.complete,
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req->base.data);
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skcipher_request_set_crypt(&rctx->fallback_req, req->src,
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req->dst, req->cryptlen, req->iv);
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ret = encrypt ? crypto_skcipher_encrypt(&rctx->fallback_req) :
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crypto_skcipher_decrypt(&rctx->fallback_req);
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return ret;
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}
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return tmpl->qce->async_req_enqueue(tmpl->qce, &req->base);
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}
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static int qce_skcipher_encrypt(struct skcipher_request *req)
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{
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return qce_skcipher_crypt(req, 1);
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}
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static int qce_skcipher_decrypt(struct skcipher_request *req)
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{
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return qce_skcipher_crypt(req, 0);
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}
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static int qce_skcipher_init(struct crypto_skcipher *tfm)
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{
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/* take the size without the fallback skcipher_request at the end */
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crypto_skcipher_set_reqsize(tfm, offsetof(struct qce_cipher_reqctx,
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fallback_req));
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return 0;
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}
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static int qce_skcipher_init_fallback(struct crypto_skcipher *tfm)
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{
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struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
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ctx->fallback = crypto_alloc_skcipher(crypto_tfm_alg_name(&tfm->base),
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0, CRYPTO_ALG_NEED_FALLBACK);
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if (IS_ERR(ctx->fallback))
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return PTR_ERR(ctx->fallback);
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crypto_skcipher_set_reqsize(tfm, sizeof(struct qce_cipher_reqctx) +
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crypto_skcipher_reqsize(ctx->fallback));
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return 0;
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}
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static void qce_skcipher_exit(struct crypto_skcipher *tfm)
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{
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struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
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crypto_free_skcipher(ctx->fallback);
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}
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struct qce_skcipher_def {
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unsigned long flags;
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const char *name;
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const char *drv_name;
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unsigned int blocksize;
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unsigned int chunksize;
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unsigned int ivsize;
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unsigned int min_keysize;
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unsigned int max_keysize;
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};
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static const struct qce_skcipher_def skcipher_def[] = {
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{
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.flags = QCE_ALG_AES | QCE_MODE_ECB,
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.name = "ecb(aes)",
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.drv_name = "ecb-aes-qce",
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.blocksize = AES_BLOCK_SIZE,
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.ivsize = 0,
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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},
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{
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.flags = QCE_ALG_AES | QCE_MODE_CBC,
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.name = "cbc(aes)",
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.drv_name = "cbc-aes-qce",
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.blocksize = AES_BLOCK_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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},
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{
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.flags = QCE_ALG_AES | QCE_MODE_CTR,
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.name = "ctr(aes)",
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.drv_name = "ctr-aes-qce",
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.blocksize = 1,
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.chunksize = AES_BLOCK_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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},
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{
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.flags = QCE_ALG_AES | QCE_MODE_XTS,
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.name = "xts(aes)",
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.drv_name = "xts-aes-qce",
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.blocksize = AES_BLOCK_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.min_keysize = AES_MIN_KEY_SIZE * 2,
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.max_keysize = AES_MAX_KEY_SIZE * 2,
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},
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{
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.flags = QCE_ALG_DES | QCE_MODE_ECB,
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.name = "ecb(des)",
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.drv_name = "ecb-des-qce",
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.blocksize = DES_BLOCK_SIZE,
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.ivsize = 0,
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.min_keysize = DES_KEY_SIZE,
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.max_keysize = DES_KEY_SIZE,
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},
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{
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.flags = QCE_ALG_DES | QCE_MODE_CBC,
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.name = "cbc(des)",
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.drv_name = "cbc-des-qce",
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.blocksize = DES_BLOCK_SIZE,
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.ivsize = DES_BLOCK_SIZE,
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.min_keysize = DES_KEY_SIZE,
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.max_keysize = DES_KEY_SIZE,
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},
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{
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.flags = QCE_ALG_3DES | QCE_MODE_ECB,
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.name = "ecb(des3_ede)",
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.drv_name = "ecb-3des-qce",
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.blocksize = DES3_EDE_BLOCK_SIZE,
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.ivsize = 0,
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.min_keysize = DES3_EDE_KEY_SIZE,
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.max_keysize = DES3_EDE_KEY_SIZE,
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},
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{
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.flags = QCE_ALG_3DES | QCE_MODE_CBC,
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.name = "cbc(des3_ede)",
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.drv_name = "cbc-3des-qce",
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.blocksize = DES3_EDE_BLOCK_SIZE,
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.ivsize = DES3_EDE_BLOCK_SIZE,
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.min_keysize = DES3_EDE_KEY_SIZE,
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.max_keysize = DES3_EDE_KEY_SIZE,
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},
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};
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static int qce_skcipher_register_one(const struct qce_skcipher_def *def,
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struct qce_device *qce)
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{
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struct qce_alg_template *tmpl;
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struct skcipher_alg *alg;
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int ret;
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tmpl = kzalloc(sizeof(*tmpl), GFP_KERNEL);
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if (!tmpl)
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return -ENOMEM;
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alg = &tmpl->alg.skcipher;
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snprintf(alg->base.cra_name, CRYPTO_MAX_ALG_NAME, "%s", def->name);
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snprintf(alg->base.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
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def->drv_name);
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alg->base.cra_blocksize = def->blocksize;
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alg->chunksize = def->chunksize;
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alg->ivsize = def->ivsize;
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alg->min_keysize = def->min_keysize;
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alg->max_keysize = def->max_keysize;
|
|
alg->setkey = IS_3DES(def->flags) ? qce_des3_setkey :
|
|
IS_DES(def->flags) ? qce_des_setkey :
|
|
qce_skcipher_setkey;
|
|
alg->encrypt = qce_skcipher_encrypt;
|
|
alg->decrypt = qce_skcipher_decrypt;
|
|
|
|
alg->base.cra_priority = 300;
|
|
alg->base.cra_flags = CRYPTO_ALG_ASYNC |
|
|
CRYPTO_ALG_ALLOCATES_MEMORY |
|
|
CRYPTO_ALG_KERN_DRIVER_ONLY;
|
|
alg->base.cra_ctxsize = sizeof(struct qce_cipher_ctx);
|
|
alg->base.cra_alignmask = 0;
|
|
alg->base.cra_module = THIS_MODULE;
|
|
|
|
if (IS_AES(def->flags)) {
|
|
alg->base.cra_flags |= CRYPTO_ALG_NEED_FALLBACK;
|
|
alg->init = qce_skcipher_init_fallback;
|
|
alg->exit = qce_skcipher_exit;
|
|
} else {
|
|
alg->init = qce_skcipher_init;
|
|
}
|
|
|
|
INIT_LIST_HEAD(&tmpl->entry);
|
|
tmpl->crypto_alg_type = CRYPTO_ALG_TYPE_SKCIPHER;
|
|
tmpl->alg_flags = def->flags;
|
|
tmpl->qce = qce;
|
|
|
|
ret = crypto_register_skcipher(alg);
|
|
if (ret) {
|
|
dev_err(qce->dev, "%s registration failed\n", alg->base.cra_name);
|
|
kfree(tmpl);
|
|
return ret;
|
|
}
|
|
|
|
list_add_tail(&tmpl->entry, &skcipher_algs);
|
|
dev_dbg(qce->dev, "%s is registered\n", alg->base.cra_name);
|
|
return 0;
|
|
}
|
|
|
|
static void qce_skcipher_unregister(struct qce_device *qce)
|
|
{
|
|
struct qce_alg_template *tmpl, *n;
|
|
|
|
list_for_each_entry_safe(tmpl, n, &skcipher_algs, entry) {
|
|
crypto_unregister_skcipher(&tmpl->alg.skcipher);
|
|
list_del(&tmpl->entry);
|
|
kfree(tmpl);
|
|
}
|
|
}
|
|
|
|
static int qce_skcipher_register(struct qce_device *qce)
|
|
{
|
|
int ret, i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(skcipher_def); i++) {
|
|
ret = qce_skcipher_register_one(&skcipher_def[i], qce);
|
|
if (ret)
|
|
goto err;
|
|
}
|
|
|
|
return 0;
|
|
err:
|
|
qce_skcipher_unregister(qce);
|
|
return ret;
|
|
}
|
|
|
|
const struct qce_algo_ops skcipher_ops = {
|
|
.type = CRYPTO_ALG_TYPE_SKCIPHER,
|
|
.register_algs = qce_skcipher_register,
|
|
.unregister_algs = qce_skcipher_unregister,
|
|
.async_req_handle = qce_skcipher_async_req_handle,
|
|
};
|