linux-stable/drivers/clk/tegra
Stephen Warren bf83b96f87 clk: tegra: Mark fuse clock as critical
For a little over a year, U-Boot on Tegra124 has configured the flow
controller to perform automatic RAM re-repair on off->on power
transitions of the CPU rail[1]. This is mandatory for correct operation
of Tegra124. However, RAM re-repair relies on certain clocks, which the
kernel must enable and leave running. The fuse clock is one of those
clocks. Mark this clock as critical so that LP1 power mode (system
suspend) operates correctly.

[1] 3cc7942a4ae5 ARM: tegra: implement RAM repair

Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
Cc: stable@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-08 12:55:19 +01:00
..
clk-audio-sync.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-bpmp.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-dfll.c clk: tegra: clk-dfll: Add suspend and resume support 2019-11-11 14:53:03 +01:00
clk-dfll.h clk: tegra: clk-dfll: Add suspend and resume support 2019-11-11 14:53:03 +01:00
clk-divider.c clk: tegra: divider: Save and restore divider rate 2019-11-11 14:53:01 +01:00
clk-emc.c clk: tegra: Use match_string() helper to simplify the code 2019-11-13 15:03:27 -08:00
clk-id.h clk: tegra: Rename sor0_lvds to sor0_out 2019-11-11 14:52:32 +01:00
clk-periph-fixed.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-periph-gate.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-periph.c clk: tegra: periph: Add restore_context support 2019-11-11 14:53:02 +01:00
clk-pll-out.c clk: tegra: pllout: Save and restore pllout context 2019-11-11 14:53:02 +01:00
clk-pll.c clk: tegra: pll: Save and restore pll context 2019-11-11 14:53:02 +01:00
clk-sdmmc-mux.c clk: tegra: periph: Add restore_context support 2019-11-11 14:53:02 +01:00
clk-super.c clk: tegra: clk-super: Add restore-context support 2019-11-11 14:53:03 +01:00
clk-tegra-audio.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-tegra-fixed.c clk: tegra: Support for OSC context save and restore 2019-11-11 14:53:02 +01:00
clk-tegra-periph.c clk: tegra: Mark fuse clock as critical 2020-01-08 12:55:19 +01:00
clk-tegra-pmc.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-tegra-super-gen4.c clk: tegra: clk-super: Fix to enable PLLP branches to CPU 2019-11-11 14:53:03 +01:00
clk-tegra20-emc.c clk: tegra: Add Tegra20/30 EMC clock implementation 2019-11-11 14:01:22 +01:00
clk-tegra20.c clk: tegra: Optimize PLLX restore on Tegra20/30 2019-11-11 14:53:04 +01:00
clk-tegra30.c clk: tegra: Optimize PLLX restore on Tegra20/30 2019-11-11 14:53:04 +01:00
clk-tegra114.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-tegra124-dfll-fcpu.c clk: tegra: clk-dfll: Add suspend and resume support 2019-11-11 14:53:03 +01:00
clk-tegra124.c clk: tegra: Reimplement SOR clock on Tegra124 2019-11-11 14:52:44 +01:00
clk-tegra210.c clk: tegra: Fix build error without CONFIG_PM_SLEEP 2019-11-11 14:53:05 +01:00
clk-utils.c clk: tegra: Refactor fractional divider calculation 2018-07-25 13:43:34 -07:00
clk.c clk: tegra: Add suspend and resume support on Tegra210 2019-11-11 14:53:04 +01:00
clk.h clk: tegra: Add suspend and resume support on Tegra210 2019-11-11 14:53:04 +01:00
cvb.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 2019-05-30 11:26:41 -07:00
cvb.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 2019-05-30 11:26:41 -07:00
Kconfig treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
Makefile clk: tegra: Add Tegra20/30 EMC clock implementation 2019-11-11 14:01:22 +01:00