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Some TI Keystone family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a reset driver that communicates to the system controller over the TI SCI protocol for performing reset management of various devices present on the SoC. Various reset functionalities are achieved by the means of different TI SCI device operations provided by the TI SCI framework. Signed-off-by: Andrew F. Davis <afd@ti.com> [s-anna@ti.com: documentation changes, revised commit message] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> [p.zabel@pengutronix.de: const struct reset_control_ops] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
22 lines
868 B
Makefile
22 lines
868 B
Makefile
obj-y += core.o
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obj-y += hisilicon/
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obj-$(CONFIG_ARCH_STI) += sti/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
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obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
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obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
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obj-$(CONFIG_RESET_GEMINI) += reset-gemini.o
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obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
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obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
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obj-$(CONFIG_RESET_MESON) += reset-meson.o
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obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
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obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
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obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
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obj-$(CONFIG_RESET_STM32) += reset-stm32.o
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obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
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obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
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obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
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obj-$(CONFIG_RESET_ZX2967) += reset-zx2967.o
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obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
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