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![Matthew Wilcox](/assets/img/avatar_default.png)
The NVRAM for both Tekram and Symbios boards allows the user to set the speed and width for individual targets. I took that code out in March 2004 when we introduced Domain Validation, but it seems there's still a legitimate need for it in some configurations. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
779 lines
20 KiB
C
779 lines
20 KiB
C
/*
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* Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
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* of PCI-SCSI IO processors.
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*
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* Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
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*
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* This driver is derived from the Linux sym53c8xx driver.
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* Copyright (C) 1998-2000 Gerard Roudier
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*
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* The sym53c8xx driver is derived from the ncr53c8xx driver that had been
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* a port of the FreeBSD ncr driver to Linux-1.2.13.
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*
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* The original ncr driver has been written for 386bsd and FreeBSD by
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* Wolfgang Stanglmeier <wolf@cologne.de>
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* Stefan Esser <se@mi.Uni-Koeln.de>
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* Copyright (C) 1994 Wolfgang Stanglmeier
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*
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* Other major contributions:
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*
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* NVRAM detection and reading.
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* Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
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*
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*-----------------------------------------------------------------------------
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "sym_glue.h"
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#include "sym_nvram.h"
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#ifdef SYM_CONF_DEBUG_NVRAM
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static u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
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#endif
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/*
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* Get host setup from NVRAM.
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*/
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void sym_nvram_setup_host(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram)
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{
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/*
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* Get parity checking, host ID, verbose mode
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* and miscellaneous host flags from NVRAM.
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*/
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switch (nvram->type) {
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case SYM_SYMBIOS_NVRAM:
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if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
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np->rv_scntl0 &= ~0x0a;
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np->myaddr = nvram->data.Symbios.host_id & 0x0f;
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if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
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np->verbose += 1;
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if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
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shost->reverse_ordering = 1;
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if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
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np->usrflags |= SYM_AVOID_BUS_RESET;
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break;
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case SYM_TEKRAM_NVRAM:
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np->myaddr = nvram->data.Tekram.host_id & 0x0f;
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break;
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#ifdef CONFIG_PARISC
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case SYM_PARISC_PDC:
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if (nvram->data.parisc.host_id != -1)
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np->myaddr = nvram->data.parisc.host_id;
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if (nvram->data.parisc.factor != -1)
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np->minsync = nvram->data.parisc.factor;
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if (nvram->data.parisc.width != -1)
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np->maxwide = nvram->data.parisc.width;
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switch (nvram->data.parisc.mode) {
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case 0: np->scsi_mode = SMODE_SE; break;
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case 1: np->scsi_mode = SMODE_HVD; break;
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case 2: np->scsi_mode = SMODE_LVD; break;
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default: break;
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}
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#endif
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default:
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break;
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}
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}
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/*
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* Get target set-up from Symbios format NVRAM.
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*/
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static void
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sym_Symbios_setup_target(struct sym_tcb *tp, int target, Symbios_nvram *nvram)
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{
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Symbios_target *tn = &nvram->target[target];
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if (!(tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED))
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tp->usrtags = 0;
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if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
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tp->usrflags &= ~SYM_DISC_ENABLED;
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if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
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tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
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if (!(tn->flags & SYMBIOS_SCAN_LUNS))
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tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
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tp->usr_period = (tn->sync_period + 3) / 4;
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tp->usr_width = (tn->bus_width == 0x8) ? 0 : 1;
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}
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static const unsigned char Tekram_sync[16] = {
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25, 31, 37, 43, 50, 62, 75, 125, 12, 15, 18, 21, 6, 7, 9, 10
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};
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/*
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* Get target set-up from Tekram format NVRAM.
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*/
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static void
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sym_Tekram_setup_target(struct sym_tcb *tp, int target, Tekram_nvram *nvram)
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{
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struct Tekram_target *tn = &nvram->target[target];
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if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
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tp->usrtags = 2 << nvram->max_tags_index;
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}
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if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
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tp->usrflags |= SYM_DISC_ENABLED;
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if (tn->flags & TEKRAM_SYNC_NEGO)
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tp->usr_period = Tekram_sync[tn->sync_index & 0xf];
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tp->usr_width = (tn->flags & TEKRAM_WIDE_NEGO) ? 1 : 0;
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}
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/*
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* Get target setup from NVRAM.
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*/
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void sym_nvram_setup_target(struct sym_tcb *tp, int target, struct sym_nvram *nvp)
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{
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switch (nvp->type) {
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case SYM_SYMBIOS_NVRAM:
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sym_Symbios_setup_target(tp, target, &nvp->data.Symbios);
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break;
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case SYM_TEKRAM_NVRAM:
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sym_Tekram_setup_target(tp, target, &nvp->data.Tekram);
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break;
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default:
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break;
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}
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}
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#ifdef SYM_CONF_DEBUG_NVRAM
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/*
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* Dump Symbios format NVRAM for debugging purpose.
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*/
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static void sym_display_Symbios_nvram(struct sym_device *np, Symbios_nvram *nvram)
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{
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int i;
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/* display Symbios nvram host data */
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printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
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sym_name(np), nvram->host_id & 0x0f,
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(nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
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(nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
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(nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
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(nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
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(nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
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(nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
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/* display Symbios nvram drive data */
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for (i = 0 ; i < 15 ; i++) {
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struct Symbios_target *tn = &nvram->target[i];
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printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
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sym_name(np), i,
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(tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
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(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
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(tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
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(tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
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tn->bus_width,
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tn->sync_period / 4,
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tn->timeout);
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}
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}
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/*
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* Dump TEKRAM format NVRAM for debugging purpose.
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*/
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static void sym_display_Tekram_nvram(struct sym_device *np, Tekram_nvram *nvram)
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{
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int i, tags, boot_delay;
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char *rem;
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/* display Tekram nvram host data */
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tags = 2 << nvram->max_tags_index;
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boot_delay = 0;
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if (nvram->boot_delay_index < 6)
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boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
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switch ((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
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default:
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case 0: rem = ""; break;
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case 1: rem = " REMOVABLE=boot device"; break;
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case 2: rem = " REMOVABLE=all"; break;
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}
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printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
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sym_name(np), nvram->host_id & 0x0f,
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(nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
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(nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES":"",
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(nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
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(nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
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(nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
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(nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
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(nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
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(nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
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rem, boot_delay, tags);
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/* display Tekram nvram drive data */
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for (i = 0; i <= 15; i++) {
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int sync, j;
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struct Tekram_target *tn = &nvram->target[i];
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j = tn->sync_index & 0xf;
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sync = Tekram_sync[j];
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printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
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sym_name(np), i,
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(tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
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(tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
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(tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
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(tn->flags & TEKRAM_START_CMD) ? " START" : "",
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(tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
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(tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
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sync);
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}
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}
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#else
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static void sym_display_Symbios_nvram(struct sym_device *np, Symbios_nvram *nvram) { (void)np; (void)nvram; }
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static void sym_display_Tekram_nvram(struct sym_device *np, Tekram_nvram *nvram) { (void)np; (void)nvram; }
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#endif /* SYM_CONF_DEBUG_NVRAM */
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/*
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* 24C16 EEPROM reading.
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*
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* GPOI0 - data in/data out
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* GPIO1 - clock
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* Symbios NVRAM wiring now also used by Tekram.
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*/
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#define SET_BIT 0
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#define CLR_BIT 1
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#define SET_CLK 2
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#define CLR_CLK 3
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/*
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* Set/clear data/clock bit in GPIO0
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*/
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static void S24C16_set_bit(struct sym_device *np, u_char write_bit, u_char *gpreg,
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int bit_mode)
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{
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udelay(5);
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switch (bit_mode) {
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case SET_BIT:
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*gpreg |= write_bit;
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break;
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case CLR_BIT:
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*gpreg &= 0xfe;
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break;
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case SET_CLK:
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*gpreg |= 0x02;
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break;
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case CLR_CLK:
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*gpreg &= 0xfd;
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break;
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}
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OUTB(np, nc_gpreg, *gpreg);
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INB(np, nc_mbox1);
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udelay(5);
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}
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/*
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* Send START condition to NVRAM to wake it up.
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*/
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static void S24C16_start(struct sym_device *np, u_char *gpreg)
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{
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S24C16_set_bit(np, 1, gpreg, SET_BIT);
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S24C16_set_bit(np, 0, gpreg, SET_CLK);
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S24C16_set_bit(np, 0, gpreg, CLR_BIT);
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S24C16_set_bit(np, 0, gpreg, CLR_CLK);
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}
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/*
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* Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
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*/
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static void S24C16_stop(struct sym_device *np, u_char *gpreg)
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{
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S24C16_set_bit(np, 0, gpreg, SET_CLK);
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S24C16_set_bit(np, 1, gpreg, SET_BIT);
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}
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/*
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* Read or write a bit to the NVRAM,
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* read if GPIO0 input else write if GPIO0 output
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*/
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static void S24C16_do_bit(struct sym_device *np, u_char *read_bit, u_char write_bit,
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u_char *gpreg)
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{
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S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
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S24C16_set_bit(np, 0, gpreg, SET_CLK);
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if (read_bit)
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*read_bit = INB(np, nc_gpreg);
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S24C16_set_bit(np, 0, gpreg, CLR_CLK);
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S24C16_set_bit(np, 0, gpreg, CLR_BIT);
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}
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/*
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* Output an ACK to the NVRAM after reading,
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* change GPIO0 to output and when done back to an input
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*/
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static void S24C16_write_ack(struct sym_device *np, u_char write_bit, u_char *gpreg,
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u_char *gpcntl)
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{
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OUTB(np, nc_gpcntl, *gpcntl & 0xfe);
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S24C16_do_bit(np, NULL, write_bit, gpreg);
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OUTB(np, nc_gpcntl, *gpcntl);
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}
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/*
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* Input an ACK from NVRAM after writing,
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* change GPIO0 to input and when done back to an output
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*/
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static void S24C16_read_ack(struct sym_device *np, u_char *read_bit, u_char *gpreg,
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u_char *gpcntl)
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{
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OUTB(np, nc_gpcntl, *gpcntl | 0x01);
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S24C16_do_bit(np, read_bit, 1, gpreg);
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OUTB(np, nc_gpcntl, *gpcntl);
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}
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/*
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* WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
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* GPIO0 must already be set as an output
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*/
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static void S24C16_write_byte(struct sym_device *np, u_char *ack_data, u_char write_data,
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u_char *gpreg, u_char *gpcntl)
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{
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int x;
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for (x = 0; x < 8; x++)
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S24C16_do_bit(np, NULL, (write_data >> (7 - x)) & 0x01, gpreg);
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S24C16_read_ack(np, ack_data, gpreg, gpcntl);
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}
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/*
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* READ a byte from the NVRAM and then send an ACK to say we have got it,
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* GPIO0 must already be set as an input
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*/
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static void S24C16_read_byte(struct sym_device *np, u_char *read_data, u_char ack_data,
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u_char *gpreg, u_char *gpcntl)
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{
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int x;
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u_char read_bit;
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*read_data = 0;
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for (x = 0; x < 8; x++) {
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S24C16_do_bit(np, &read_bit, 1, gpreg);
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*read_data |= ((read_bit & 0x01) << (7 - x));
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}
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S24C16_write_ack(np, ack_data, gpreg, gpcntl);
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}
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#ifdef SYM_CONF_NVRAM_WRITE_SUPPORT
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/*
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* Write 'len' bytes starting at 'offset'.
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*/
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static int sym_write_S24C16_nvram(struct sym_device *np, int offset,
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u_char *data, int len)
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{
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u_char gpcntl, gpreg;
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u_char old_gpcntl, old_gpreg;
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u_char ack_data;
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int x;
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/* save current state of GPCNTL and GPREG */
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old_gpreg = INB(np, nc_gpreg);
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old_gpcntl = INB(np, nc_gpcntl);
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gpcntl = old_gpcntl & 0x1c;
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/* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
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OUTB(np, nc_gpreg, old_gpreg);
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OUTB(np, nc_gpcntl, gpcntl);
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/* this is to set NVRAM into a known state with GPIO0/1 both low */
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gpreg = old_gpreg;
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S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
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S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
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/* now set NVRAM inactive with GPIO0/1 both high */
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S24C16_stop(np, &gpreg);
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/* NVRAM has to be written in segments of 16 bytes */
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for (x = 0; x < len ; x += 16) {
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do {
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S24C16_start(np, &gpreg);
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S24C16_write_byte(np, &ack_data,
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0xa0 | (((offset+x) >> 7) & 0x0e),
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&gpreg, &gpcntl);
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} while (ack_data & 0x01);
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S24C16_write_byte(np, &ack_data, (offset+x) & 0xff,
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&gpreg, &gpcntl);
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for (y = 0; y < 16; y++)
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S24C16_write_byte(np, &ack_data, data[x+y],
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&gpreg, &gpcntl);
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S24C16_stop(np, &gpreg);
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}
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/* return GPIO0/1 to original states after having accessed NVRAM */
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OUTB(np, nc_gpcntl, old_gpcntl);
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OUTB(np, nc_gpreg, old_gpreg);
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return 0;
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}
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#endif /* SYM_CONF_NVRAM_WRITE_SUPPORT */
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/*
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* Read 'len' bytes starting at 'offset'.
|
|
*/
|
|
static int sym_read_S24C16_nvram(struct sym_device *np, int offset, u_char *data, int len)
|
|
{
|
|
u_char gpcntl, gpreg;
|
|
u_char old_gpcntl, old_gpreg;
|
|
u_char ack_data;
|
|
int retv = 1;
|
|
int x;
|
|
|
|
/* save current state of GPCNTL and GPREG */
|
|
old_gpreg = INB(np, nc_gpreg);
|
|
old_gpcntl = INB(np, nc_gpcntl);
|
|
gpcntl = old_gpcntl & 0x1c;
|
|
|
|
/* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
|
|
OUTB(np, nc_gpreg, old_gpreg);
|
|
OUTB(np, nc_gpcntl, gpcntl);
|
|
|
|
/* this is to set NVRAM into a known state with GPIO0/1 both low */
|
|
gpreg = old_gpreg;
|
|
S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
|
|
S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
|
|
|
|
/* now set NVRAM inactive with GPIO0/1 both high */
|
|
S24C16_stop(np, &gpreg);
|
|
|
|
/* activate NVRAM */
|
|
S24C16_start(np, &gpreg);
|
|
|
|
/* write device code and random address MSB */
|
|
S24C16_write_byte(np, &ack_data,
|
|
0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
|
|
if (ack_data & 0x01)
|
|
goto out;
|
|
|
|
/* write random address LSB */
|
|
S24C16_write_byte(np, &ack_data,
|
|
offset & 0xff, &gpreg, &gpcntl);
|
|
if (ack_data & 0x01)
|
|
goto out;
|
|
|
|
/* regenerate START state to set up for reading */
|
|
S24C16_start(np, &gpreg);
|
|
|
|
/* rewrite device code and address MSB with read bit set (lsb = 0x01) */
|
|
S24C16_write_byte(np, &ack_data,
|
|
0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
|
|
if (ack_data & 0x01)
|
|
goto out;
|
|
|
|
/* now set up GPIO0 for inputting data */
|
|
gpcntl |= 0x01;
|
|
OUTB(np, nc_gpcntl, gpcntl);
|
|
|
|
/* input all requested data - only part of total NVRAM */
|
|
for (x = 0; x < len; x++)
|
|
S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
|
|
|
|
/* finally put NVRAM back in inactive mode */
|
|
gpcntl &= 0xfe;
|
|
OUTB(np, nc_gpcntl, gpcntl);
|
|
S24C16_stop(np, &gpreg);
|
|
retv = 0;
|
|
out:
|
|
/* return GPIO0/1 to original states after having accessed NVRAM */
|
|
OUTB(np, nc_gpcntl, old_gpcntl);
|
|
OUTB(np, nc_gpreg, old_gpreg);
|
|
|
|
return retv;
|
|
}
|
|
|
|
#undef SET_BIT
|
|
#undef CLR_BIT
|
|
#undef SET_CLK
|
|
#undef CLR_CLK
|
|
|
|
/*
|
|
* Try reading Symbios NVRAM.
|
|
* Return 0 if OK.
|
|
*/
|
|
static int sym_read_Symbios_nvram(struct sym_device *np, Symbios_nvram *nvram)
|
|
{
|
|
static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
|
|
u_char *data = (u_char *) nvram;
|
|
int len = sizeof(*nvram);
|
|
u_short csum;
|
|
int x;
|
|
|
|
/* probe the 24c16 and read the SYMBIOS 24c16 area */
|
|
if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
|
|
return 1;
|
|
|
|
/* check valid NVRAM signature, verify byte count and checksum */
|
|
if (nvram->type != 0 ||
|
|
memcmp(nvram->trailer, Symbios_trailer, 6) ||
|
|
nvram->byte_count != len - 12)
|
|
return 1;
|
|
|
|
/* verify checksum */
|
|
for (x = 6, csum = 0; x < len - 6; x++)
|
|
csum += data[x];
|
|
if (csum != nvram->checksum)
|
|
return 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* 93C46 EEPROM reading.
|
|
*
|
|
* GPOI0 - data in
|
|
* GPIO1 - data out
|
|
* GPIO2 - clock
|
|
* GPIO4 - chip select
|
|
*
|
|
* Used by Tekram.
|
|
*/
|
|
|
|
/*
|
|
* Pulse clock bit in GPIO0
|
|
*/
|
|
static void T93C46_Clk(struct sym_device *np, u_char *gpreg)
|
|
{
|
|
OUTB(np, nc_gpreg, *gpreg | 0x04);
|
|
INB(np, nc_mbox1);
|
|
udelay(2);
|
|
OUTB(np, nc_gpreg, *gpreg);
|
|
}
|
|
|
|
/*
|
|
* Read bit from NVRAM
|
|
*/
|
|
static void T93C46_Read_Bit(struct sym_device *np, u_char *read_bit, u_char *gpreg)
|
|
{
|
|
udelay(2);
|
|
T93C46_Clk(np, gpreg);
|
|
*read_bit = INB(np, nc_gpreg);
|
|
}
|
|
|
|
/*
|
|
* Write bit to GPIO0
|
|
*/
|
|
static void T93C46_Write_Bit(struct sym_device *np, u_char write_bit, u_char *gpreg)
|
|
{
|
|
if (write_bit & 0x01)
|
|
*gpreg |= 0x02;
|
|
else
|
|
*gpreg &= 0xfd;
|
|
|
|
*gpreg |= 0x10;
|
|
|
|
OUTB(np, nc_gpreg, *gpreg);
|
|
INB(np, nc_mbox1);
|
|
udelay(2);
|
|
|
|
T93C46_Clk(np, gpreg);
|
|
}
|
|
|
|
/*
|
|
* Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
|
|
*/
|
|
static void T93C46_Stop(struct sym_device *np, u_char *gpreg)
|
|
{
|
|
*gpreg &= 0xef;
|
|
OUTB(np, nc_gpreg, *gpreg);
|
|
INB(np, nc_mbox1);
|
|
udelay(2);
|
|
|
|
T93C46_Clk(np, gpreg);
|
|
}
|
|
|
|
/*
|
|
* Send read command and address to NVRAM
|
|
*/
|
|
static void T93C46_Send_Command(struct sym_device *np, u_short write_data,
|
|
u_char *read_bit, u_char *gpreg)
|
|
{
|
|
int x;
|
|
|
|
/* send 9 bits, start bit (1), command (2), address (6) */
|
|
for (x = 0; x < 9; x++)
|
|
T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
|
|
|
|
*read_bit = INB(np, nc_gpreg);
|
|
}
|
|
|
|
/*
|
|
* READ 2 bytes from the NVRAM
|
|
*/
|
|
static void T93C46_Read_Word(struct sym_device *np,
|
|
unsigned short *nvram_data, unsigned char *gpreg)
|
|
{
|
|
int x;
|
|
u_char read_bit;
|
|
|
|
*nvram_data = 0;
|
|
for (x = 0; x < 16; x++) {
|
|
T93C46_Read_Bit(np, &read_bit, gpreg);
|
|
|
|
if (read_bit & 0x01)
|
|
*nvram_data |= (0x01 << (15 - x));
|
|
else
|
|
*nvram_data &= ~(0x01 << (15 - x));
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Read Tekram NvRAM data.
|
|
*/
|
|
static int T93C46_Read_Data(struct sym_device *np, unsigned short *data,
|
|
int len, unsigned char *gpreg)
|
|
{
|
|
int x;
|
|
|
|
for (x = 0; x < len; x++) {
|
|
unsigned char read_bit;
|
|
/* output read command and address */
|
|
T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
|
|
if (read_bit & 0x01)
|
|
return 1; /* Bad */
|
|
T93C46_Read_Word(np, &data[x], gpreg);
|
|
T93C46_Stop(np, gpreg);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Try reading 93C46 Tekram NVRAM.
|
|
*/
|
|
static int sym_read_T93C46_nvram(struct sym_device *np, Tekram_nvram *nvram)
|
|
{
|
|
u_char gpcntl, gpreg;
|
|
u_char old_gpcntl, old_gpreg;
|
|
int retv = 1;
|
|
|
|
/* save current state of GPCNTL and GPREG */
|
|
old_gpreg = INB(np, nc_gpreg);
|
|
old_gpcntl = INB(np, nc_gpcntl);
|
|
|
|
/* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
|
|
1/2/4 out */
|
|
gpreg = old_gpreg & 0xe9;
|
|
OUTB(np, nc_gpreg, gpreg);
|
|
gpcntl = (old_gpcntl & 0xe9) | 0x09;
|
|
OUTB(np, nc_gpcntl, gpcntl);
|
|
|
|
/* input all of NVRAM, 64 words */
|
|
retv = T93C46_Read_Data(np, (u_short *) nvram,
|
|
sizeof(*nvram) / sizeof(short), &gpreg);
|
|
|
|
/* return GPIO0/1/2/4 to original states after having accessed NVRAM */
|
|
OUTB(np, nc_gpcntl, old_gpcntl);
|
|
OUTB(np, nc_gpreg, old_gpreg);
|
|
|
|
return retv;
|
|
}
|
|
|
|
/*
|
|
* Try reading Tekram NVRAM.
|
|
* Return 0 if OK.
|
|
*/
|
|
static int sym_read_Tekram_nvram (struct sym_device *np, Tekram_nvram *nvram)
|
|
{
|
|
u_char *data = (u_char *) nvram;
|
|
int len = sizeof(*nvram);
|
|
u_short csum;
|
|
int x;
|
|
|
|
switch (np->device_id) {
|
|
case PCI_DEVICE_ID_NCR_53C885:
|
|
case PCI_DEVICE_ID_NCR_53C895:
|
|
case PCI_DEVICE_ID_NCR_53C896:
|
|
x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
|
|
data, len);
|
|
break;
|
|
case PCI_DEVICE_ID_NCR_53C875:
|
|
x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
|
|
data, len);
|
|
if (!x)
|
|
break;
|
|
default:
|
|
x = sym_read_T93C46_nvram(np, nvram);
|
|
break;
|
|
}
|
|
if (x)
|
|
return 1;
|
|
|
|
/* verify checksum */
|
|
for (x = 0, csum = 0; x < len - 1; x += 2)
|
|
csum += data[x] + (data[x+1] << 8);
|
|
if (csum != 0x1234)
|
|
return 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PARISC
|
|
/*
|
|
* Host firmware (PDC) keeps a table for altering SCSI capabilities.
|
|
* Many newer machines export one channel of 53c896 chip as SE, 50-pin HD.
|
|
* Also used for Multi-initiator SCSI clusters to set the SCSI Initiator ID.
|
|
*/
|
|
static int sym_read_parisc_pdc(struct sym_device *np, struct pdc_initiator *pdc)
|
|
{
|
|
struct hardware_path hwpath;
|
|
get_pci_node_path(np->pdev, &hwpath);
|
|
if (!pdc_get_initiator(&hwpath, pdc))
|
|
return 0;
|
|
|
|
return SYM_PARISC_PDC;
|
|
}
|
|
#else
|
|
static inline int sym_read_parisc_pdc(struct sym_device *np,
|
|
struct pdc_initiator *x)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Try reading Symbios or Tekram NVRAM
|
|
*/
|
|
int sym_read_nvram(struct sym_device *np, struct sym_nvram *nvp)
|
|
{
|
|
if (!sym_read_Symbios_nvram(np, &nvp->data.Symbios)) {
|
|
nvp->type = SYM_SYMBIOS_NVRAM;
|
|
sym_display_Symbios_nvram(np, &nvp->data.Symbios);
|
|
} else if (!sym_read_Tekram_nvram(np, &nvp->data.Tekram)) {
|
|
nvp->type = SYM_TEKRAM_NVRAM;
|
|
sym_display_Tekram_nvram(np, &nvp->data.Tekram);
|
|
} else {
|
|
nvp->type = sym_read_parisc_pdc(np, &nvp->data.parisc);
|
|
}
|
|
return nvp->type;
|
|
}
|
|
|
|
char *sym_nvram_type(struct sym_nvram *nvp)
|
|
{
|
|
switch (nvp->type) {
|
|
case SYM_SYMBIOS_NVRAM:
|
|
return "Symbios NVRAM";
|
|
case SYM_TEKRAM_NVRAM:
|
|
return "Tekram NVRAM";
|
|
case SYM_PARISC_PDC:
|
|
return "PA-RISC Firmware";
|
|
default:
|
|
return "No NVRAM";
|
|
}
|
|
}
|