linux-stable/drivers/clk/renesas
Andrey Gusakov 2bd9feed23 clk: renesas: r8a779[56]x: Add MLP clocks
Add clocks for MLP modules on Renesas R-Car H3 and M3-W/N SoCs.

Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Link: https://lore.kernel.org/r/20210929213431.5275-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-15 09:46:14 +02:00
..
clk-div6.c clk: renesas: div6: Implement range checking 2021-05-11 09:58:13 +02:00
clk-div6.h
clk-emev2.c
clk-mstp.c clk: renesas: Zero init clk_init_data 2021-03-30 09:58:27 +02:00
clk-r8a73a4.c
clk-r8a7740.c
clk-r8a7778.c
clk-r8a7779.c
clk-rz.c remove ioremap_nocache and devm_ioremap_nocache 2020-01-06 09:45:59 +01:00
clk-sh73a0.c clk: renesas: sh73a0: Stop using __raw_*() I/O accessors 2020-12-10 08:34:01 +01:00
Kconfig clk: renesas: Make CLK_R9A06G032 invisible 2021-08-13 12:05:41 +02:00
Makefile clk: renesas: Rename renesas-rzg2l-cpg.[ch] to rzg2l-cpg.[ch] 2021-07-19 11:22:20 +02:00
r7s9210-cpg-mssr.c clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag 2020-09-17 15:30:08 +02:00
r8a774a1-cpg-mssr.c clk: renesas: rzg2: Rename i2c-dvfs to iic-pmic 2021-07-19 10:53:52 +02:00
r8a774b1-cpg-mssr.c clk: renesas: rzg2: Rename i2c-dvfs to iic-pmic 2021-07-19 10:53:52 +02:00
r8a774c0-cpg-mssr.c clk: renesas: rzg2: Rename i2c-dvfs to iic-pmic 2021-07-19 10:53:52 +02:00
r8a774e1-cpg-mssr.c clk: renesas: rzg2: Rename i2c-dvfs to iic-pmic 2021-07-19 10:53:52 +02:00
r8a779a0-cpg-mssr.c clk: renesas: r8a779a0: Add RPC support 2021-10-08 15:09:17 +02:00
r8a7742-cpg-mssr.c clk: renesas: r8a7742: Add clk entry for VSPR 2020-09-04 09:42:01 +02:00
r8a7743-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7745-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7790-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7791-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7792-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7794-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7795-cpg-mssr.c clk: renesas: r8a779[56]x: Add MLP clocks 2021-10-15 09:46:14 +02:00
r8a7796-cpg-mssr.c clk: renesas: r8a779[56]x: Add MLP clocks 2021-10-15 09:46:14 +02:00
r8a77470-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a77965-cpg-mssr.c clk: renesas: r8a779[56]x: Add MLP clocks 2021-10-15 09:46:14 +02:00
r8a77970-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r8a77980-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r8a77990-cpg-mssr.c clk: renesas: r8a77990: Add DAB clock 2021-03-08 10:30:02 +01:00
r8a77995-cpg-mssr.c clk: renesas: r8a77995: Add ZA2 clock 2021-05-27 15:27:28 +02:00
r9a06g032-clocks.c clk: renesas: r9a06g032: Switch to .determine_rate() 2021-05-11 10:00:40 +02:00
r9a07g044-cpg.c clk: renesas: r9a07g044: Add SDHI clock and reset entries 2021-10-08 15:10:36 +02:00
rcar-cpg-lib.c clk: renesas: cpg-lib: Move RPC clock registration to the library 2021-10-08 15:09:17 +02:00
rcar-cpg-lib.h clk: renesas: cpg-lib: Move RPC clock registration to the library 2021-10-08 15:09:17 +02:00
rcar-gen2-cpg.c clk: renesas: Zero init clk_init_data 2021-03-30 09:58:27 +02:00
rcar-gen2-cpg.h clk: renesas: rcar-gen2: Change multipliers and dividers to u8 2019-12-10 10:24:10 +01:00
rcar-gen3-cpg.c clk: renesas: cpg-lib: Move RPC clock registration to the library 2021-10-08 15:09:17 +02:00
rcar-gen3-cpg.h clk: renesas: r8a774c0: Add RPC clocks 2020-12-10 08:34:01 +01:00
rcar-usb2-clock-sel.c clk: renesas: rcar-usb2-clock-sel: Fix kernel NULL pointer dereference 2021-08-28 21:29:36 -07:00
renesas-cpg-mssr.c clk: renesas: cpg-mssr: Make srstclr[] comment block consistent 2021-05-27 15:27:16 +02:00
renesas-cpg-mssr.h clk: renesas: cpg-mssr: Add support for R-Car V3U 2020-09-17 15:32:25 +02:00
rzg2l-cpg.c clk: renesas: rzg2l: Add SDHI clk mux support 2021-10-08 15:10:36 +02:00
rzg2l-cpg.h clk: renesas: r9a07g044: Add SDHI clock and reset entries 2021-10-08 15:10:36 +02:00