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d3b8b0855a
Convert the devicetree bindings for the Google Security Chip H1 running Cr50 firmware to DT schema. The chip can be attached to SPI or I²C. Existing devicetrees use the same "google,cr50" compatible string for both cases without additionally specifying a generic "tcg,tpm_tis-spi" or "tcg,tpm-tis-i2c" compatible. The chip therefore cannot be documented in the tcg,tpm_tis-spi.yaml and tcg,tpm-tis-i2c.yaml schemas: The validator would select both of them and complain about SPI properties when the chip is an I²C peripheral. So document the chip in a schema of its own which includes both, SPI and I²C properties by reference. Signed-off-by: Lukas Wunner <lukas@wunner.de> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/52635205818ab201cacb0c0f37c7fa48149c7f8e.1702806810.git.lukas@wunner.de Signed-off-by: Rob Herring <robh@kernel.org>
65 lines
1.7 KiB
YAML
65 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/tpm/google,cr50.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Google Security Chip H1 (running Cr50 firmware)
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maintainers:
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- Andrey Pronin <apronin@chromium.org>
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description: |
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Google has designed a family of security chips called "Titan".
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One member is the H1 built into Chromebooks and running Cr50 firmware:
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https://www.osfc.io/2018/talks/google-secure-microcontroller-and-ccd-closed-case-debugging/
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The chip provides several functions, including TPM 2.0 like functionality.
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It communicates over SPI or I²C using the FIFO protocol described in the
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TCG PC Client Platform TPM Profile Specification for TPM 2.0 (PTP), sec 6:
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https://trustedcomputinggroup.org/resource/pc-client-platform-tpm-profile-ptp-specification/
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properties:
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compatible:
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const: google,cr50
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allOf:
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- $ref: tpm-common.yaml#
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anyOf:
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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- $ref: tcg,tpm-tis-i2c.yaml#/properties/reg
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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tpm@0 {
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reg = <0>;
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compatible = "google,cr50";
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spi-max-frequency = <800000>;
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};
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};
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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tpm@50 {
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compatible = "google,cr50";
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reg = <0x50>;
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interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <&cr50_int>;
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};
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};
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