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e92935e13a
This patch adds device tree support for gpio-lpc32xx.c. To register the various GPIO banks as (struct) gpio_chips via the same DT gpio-controller, we utilize the adjusted of_xlate API to manipulate the actually used struct gpio_chip. Signed-off-by: Roland Stigge <stigge@antcom.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
43 lines
980 B
Text
43 lines
980 B
Text
NXP LPC32xx SoC GPIO controller
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Required properties:
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- compatible: must be "nxp,lpc3220-gpio"
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- reg: Physical base address and length of the controller's registers.
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- gpio-controller: Marks the device node as a GPIO controller.
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- #gpio-cells: Should be 3:
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1) bank:
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0: GPIO P0
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1: GPIO P1
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2: GPIO P2
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3: GPIO P3
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4: GPI P3
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5: GPO P3
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2) pin number
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3) optional parameters:
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- bit 0 specifies polarity (0 for normal, 1 for inverted)
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- reg: Index of the GPIO group
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Example:
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gpio: gpio@40028000 {
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compatible = "nxp,lpc3220-gpio";
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reg = <0x40028000 0x1000>;
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gpio-controller;
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#gpio-cells = <3>; /* bank, pin, flags */
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};
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leds {
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compatible = "gpio-leds";
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led0 {
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gpios = <&gpio 5 1 1>; /* GPO_P3 1, active low */
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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led1 {
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gpios = <&gpio 5 14 1>; /* GPO_P3 14, active low */
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linux,default-trigger = "timer";
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default-state = "off";
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};
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};
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