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M66592 has the pin of WR0 and WR1. So, if one write-pin of CPU connects to the pins, we have to change the setting of FIFOSEL register in the controller. If we don't change the setting, the controller cannot send the data of odd length. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
46 lines
1.4 KiB
C
46 lines
1.4 KiB
C
/*
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* M66592 driver platform data
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*
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* Copyright (C) 2009 Renesas Solutions Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#ifndef __LINUX_USB_M66592_H
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#define __LINUX_USB_M66592_H
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#define M66592_PLATDATA_XTAL_12MHZ 0x01
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#define M66592_PLATDATA_XTAL_24MHZ 0x02
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#define M66592_PLATDATA_XTAL_48MHZ 0x03
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struct m66592_platdata {
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/* one = on chip controller, zero = external controller */
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unsigned on_chip:1;
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/* one = big endian, zero = little endian */
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unsigned endian:1;
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/* (external controller only) M66592_PLATDATA_XTAL_nnMHZ */
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unsigned xtal:2;
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/* (external controller only) one = 3.3V, zero = 1.5V */
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unsigned vif:1;
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/* (external controller only) set one = WR0_N shorted to WR1_N */
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unsigned wr0_shorted_to_wr1:1;
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};
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#endif /* __LINUX_USB_M66592_H */
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