189 lines
6.3 KiB
C
189 lines
6.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Regents of the University of California
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*/
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#ifndef _ASM_RISCV_PROCESSOR_H
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#define _ASM_RISCV_PROCESSOR_H
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#include <linux/const.h>
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#include <linux/cache.h>
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#include <linux/prctl.h>
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#include <vdso/processor.h>
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#include <asm/ptrace.h>
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/*
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* addr is a hint to the maximum userspace address that mmap should provide, so
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* this macro needs to return the largest address space available so that
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* mmap_end < addr, being mmap_end the top of that address space.
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* See Documentation/arch/riscv/vm-layout.rst for more details.
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*/
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#define arch_get_mmap_end(addr, len, flags) \
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({ \
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unsigned long mmap_end; \
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typeof(addr) _addr = (addr); \
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if ((_addr) == 0 || is_compat_task() || \
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((_addr + len) > BIT(VA_BITS - 1))) \
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mmap_end = STACK_TOP_MAX; \
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else \
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mmap_end = (_addr + len); \
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mmap_end; \
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})
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#define arch_get_mmap_base(addr, base) \
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({ \
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unsigned long mmap_base; \
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typeof(addr) _addr = (addr); \
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typeof(base) _base = (base); \
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unsigned long rnd_gap = DEFAULT_MAP_WINDOW - (_base); \
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if ((_addr) == 0 || is_compat_task() || \
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((_addr + len) > BIT(VA_BITS - 1))) \
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mmap_base = (_base); \
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else \
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mmap_base = (_addr + len) - rnd_gap; \
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mmap_base; \
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})
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#ifdef CONFIG_64BIT
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#define DEFAULT_MAP_WINDOW (UL(1) << (MMAP_VA_BITS - 1))
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#define STACK_TOP_MAX TASK_SIZE_64
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#else
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#define DEFAULT_MAP_WINDOW TASK_SIZE
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#define STACK_TOP_MAX TASK_SIZE
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#endif
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#define STACK_ALIGN 16
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#define STACK_TOP DEFAULT_MAP_WINDOW
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/*
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* This decides where the kernel will search for a free chunk of vm
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* space during mmap's.
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*/
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#ifdef CONFIG_64BIT
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#define TASK_UNMAPPED_BASE PAGE_ALIGN((UL(1) << MMAP_MIN_VA_BITS) / 3)
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#else
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#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
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#endif
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#ifndef __ASSEMBLY__
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struct task_struct;
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struct pt_regs;
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/*
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* We use a flag to track in-kernel Vector context. Currently the flag has the
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* following meaning:
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*
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* - bit 0: indicates whether the in-kernel Vector context is active. The
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* activation of this state disables the preemption. On a non-RT kernel, it
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* also disable bh.
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* - bits 8: is used for tracking preemptible kernel-mode Vector, when
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* RISCV_ISA_V_PREEMPTIVE is enabled. Calling kernel_vector_begin() does not
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* disable the preemption if the thread's kernel_vstate.datap is allocated.
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* Instead, the kernel set this bit field. Then the trap entry/exit code
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* knows if we are entering/exiting the context that owns preempt_v.
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* - 0: the task is not using preempt_v
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* - 1: the task is actively using preempt_v. But whether does the task own
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* the preempt_v context is decided by bits in RISCV_V_CTX_DEPTH_MASK.
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* - bit 16-23 are RISCV_V_CTX_DEPTH_MASK, used by context tracking routine
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* when preempt_v starts:
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* - 0: the task is actively using, and own preempt_v context.
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* - non-zero: the task was using preempt_v, but then took a trap within.
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* Thus, the task does not own preempt_v. Any use of Vector will have to
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* save preempt_v, if dirty, and fallback to non-preemptible kernel-mode
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* Vector.
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* - bit 30: The in-kernel preempt_v context is saved, and requries to be
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* restored when returning to the context that owns the preempt_v.
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* - bit 31: The in-kernel preempt_v context is dirty, as signaled by the
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* trap entry code. Any context switches out-of current task need to save
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* it to the task's in-kernel V context. Also, any traps nesting on-top-of
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* preempt_v requesting to use V needs a save.
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*/
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#define RISCV_V_CTX_DEPTH_MASK 0x00ff0000
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#define RISCV_V_CTX_UNIT_DEPTH 0x00010000
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#define RISCV_KERNEL_MODE_V 0x00000001
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#define RISCV_PREEMPT_V 0x00000100
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#define RISCV_PREEMPT_V_DIRTY 0x80000000
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#define RISCV_PREEMPT_V_NEED_RESTORE 0x40000000
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/* CPU-specific state of a task */
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struct thread_struct {
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/* Callee-saved registers */
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unsigned long ra;
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unsigned long sp; /* Kernel mode stack */
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unsigned long s[12]; /* s[0]: frame pointer */
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struct __riscv_d_ext_state fstate;
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unsigned long bad_cause;
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u32 riscv_v_flags;
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u32 vstate_ctrl;
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struct __riscv_v_ext_state vstate;
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unsigned long align_ctl;
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struct __riscv_v_ext_state kernel_vstate;
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};
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/* Whitelist the fstate from the task_struct for hardened usercopy */
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static inline void arch_thread_struct_whitelist(unsigned long *offset,
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unsigned long *size)
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{
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*offset = offsetof(struct thread_struct, fstate);
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*size = sizeof_field(struct thread_struct, fstate);
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}
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#define INIT_THREAD { \
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.sp = sizeof(init_stack) + (long)&init_stack, \
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.align_ctl = PR_UNALIGN_NOPRINT, \
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}
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#define task_pt_regs(tsk) \
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((struct pt_regs *)(task_stack_page(tsk) + THREAD_SIZE \
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- ALIGN(sizeof(struct pt_regs), STACK_ALIGN)))
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#define KSTK_EIP(tsk) (task_pt_regs(tsk)->epc)
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#define KSTK_ESP(tsk) (task_pt_regs(tsk)->sp)
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/* Do necessary setup to start up a newly executed thread. */
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extern void start_thread(struct pt_regs *regs,
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unsigned long pc, unsigned long sp);
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extern unsigned long __get_wchan(struct task_struct *p);
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static inline void wait_for_interrupt(void)
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{
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__asm__ __volatile__ ("wfi");
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}
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extern phys_addr_t dma32_phys_limit;
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struct device_node;
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int riscv_of_processor_hartid(struct device_node *node, unsigned long *hartid);
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int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hartid);
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int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid);
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extern void riscv_fill_hwcap(void);
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extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
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extern unsigned long signal_minsigstksz __ro_after_init;
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#ifdef CONFIG_RISCV_ISA_V
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/* Userspace interface for PR_RISCV_V_{SET,GET}_VS prctl()s: */
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#define RISCV_V_SET_CONTROL(arg) riscv_v_vstate_ctrl_set_current(arg)
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#define RISCV_V_GET_CONTROL() riscv_v_vstate_ctrl_get_current()
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extern long riscv_v_vstate_ctrl_set_current(unsigned long arg);
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extern long riscv_v_vstate_ctrl_get_current(void);
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#endif /* CONFIG_RISCV_ISA_V */
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extern int get_unalign_ctl(struct task_struct *tsk, unsigned long addr);
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extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val);
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#define GET_UNALIGN_CTL(tsk, addr) get_unalign_ctl((tsk), (addr))
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#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_RISCV_PROCESSOR_H */
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