linux-stable/drivers/gpu/drm/amd/include/asic_reg/dce
Alan Liu 7c50a3e99a drm/amd/display: Program ACP related register
- Setup the shift and mask of HDMI_ACP_SEND register
- Program the register in hdmi stream encoder
- Also update ACP register in azalia configuration

Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alan Liu <HaoPing.Liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-05 16:13:18 -04:00
..
dce_6_0_d.h drm/amdgpu: add some required DCE6 registers (v7) 2020-07-27 16:45:39 -04:00
dce_6_0_sh_mask.h drm/amd/display: Program ACP related register 2022-07-05 16:13:18 -04:00
dce_8_0_d.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00
dce_8_0_enum.h
dce_8_0_sh_mask.h drm/amd/display: Add HDMI_ACP_SEND register 2022-05-26 14:56:32 -04:00
dce_10_0_d.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00
dce_10_0_enum.h
dce_10_0_sh_mask.h drm/amd/display: Add HDMI_ACP_SEND register 2022-05-26 14:56:32 -04:00
dce_11_0_d.h drm/amdgpu/display/dc: Add ACP_DATA register 2022-06-03 16:45:01 -04:00
dce_11_0_enum.h
dce_11_0_sh_mask.h drm/amdgpu/display/dc: Add ACP_DATA register 2022-06-03 16:45:01 -04:00
dce_11_2_d.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00
dce_11_2_enum.h
dce_11_2_sh_mask.h drm/amd/display: Add HDMI_ACP_SEND register 2022-05-26 14:56:32 -04:00
dce_12_0_offset.h drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling 2020-08-26 16:40:18 -04:00
dce_12_0_sh_mask.h drm/amd/display: Add HDMI_ACP_SEND register 2022-05-26 14:56:32 -04:00