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c2fdf53e16
All the values we have in {icl_mg,tgl_dkl}_phy_ddi_buf_trans
fit into u8. Shrink the types accordingly.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211006204937.30774-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
73 lines
1.5 KiB
C
73 lines
1.5 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2020 Intel Corporation
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*/
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#ifndef _INTEL_DDI_BUF_TRANS_H_
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#define _INTEL_DDI_BUF_TRANS_H_
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#include <linux/types.h>
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struct drm_i915_private;
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struct intel_encoder;
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struct intel_crtc_state;
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struct hsw_ddi_buf_trans {
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u32 trans1; /* balance leg enable, de-emph level */
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u32 trans2; /* vref sel, vswing */
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u8 i_boost; /* SKL: I_boost; valid: 0x0, 0x1, 0x3, 0x7 */
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};
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struct bxt_ddi_buf_trans {
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u8 margin; /* swing value */
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u8 scale; /* scale value */
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u8 enable; /* scale enable */
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u8 deemphasis;
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};
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struct icl_ddi_buf_trans {
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u8 dw2_swing_sel;
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u8 dw7_n_scalar;
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u8 dw4_cursor_coeff;
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u8 dw4_post_cursor_2;
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u8 dw4_post_cursor_1;
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};
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struct icl_mg_phy_ddi_buf_trans {
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u8 cri_txdeemph_override_11_6;
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u8 cri_txdeemph_override_5_0;
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u8 cri_txdeemph_override_17_12;
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};
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struct tgl_dkl_phy_ddi_buf_trans {
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u8 vswing;
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u8 preshoot;
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u8 de_emphasis;
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};
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struct dg2_snps_phy_buf_trans {
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u8 vswing;
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u8 pre_cursor;
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u8 post_cursor;
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};
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union intel_ddi_buf_trans_entry {
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struct hsw_ddi_buf_trans hsw;
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struct bxt_ddi_buf_trans bxt;
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struct icl_ddi_buf_trans icl;
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struct icl_mg_phy_ddi_buf_trans mg;
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struct tgl_dkl_phy_ddi_buf_trans dkl;
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struct dg2_snps_phy_buf_trans snps;
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};
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struct intel_ddi_buf_trans {
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const union intel_ddi_buf_trans_entry *entries;
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u8 num_entries;
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u8 hdmi_default_entry;
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};
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bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
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void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
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#endif
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