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![Imre Deak](/assets/img/avatar_default.png)
So far TC-cold was blocked only for the duration of TypeC mode resets. The DP-alt and legacy modes require TC-cold to be blocked also whenever the port is in use (AUX transfers, enable modeset), and this was ensured by the held PHY ownership flag. On ADL-P this doesn't work, since the PHY ownership flag is in a register backed by the PW#2 power well. Whenever this power well is disabled the ownership flag is cleared by the HW under the driver. The only way to cleanly release and re-acquire the PHY ownership flag and also allow for power saving (by disabling the display power wells and reaching DC5/6 states) is to hold the TC-cold blocking power domains while the PHY is connected and disconnect/reconnect the PHY on-demand around AUX transfers and modeset enable/disables. Let's do that, disconnecting a PHY with a 1 sec delay after it becomes idle. For consistency do this on all platforms and TypeC modes. v2: Add tc_mode!=disconnected and phy_is_owned asserts to __intel_tc_port_lock(). Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210929132833.2253961-6-imre.deak@intel.com
40 lines
1.5 KiB
C
40 lines
1.5 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_TC_H__
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#define __INTEL_TC_H__
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#include <linux/mutex.h>
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#include <linux/types.h>
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struct intel_digital_port;
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struct intel_encoder;
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bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port);
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bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);
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bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port);
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bool intel_tc_port_connected(struct intel_encoder *encoder);
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u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
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u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port);
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int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port);
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void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
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int required_lanes);
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void intel_tc_port_sanitize(struct intel_digital_port *dig_port);
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void intel_tc_port_lock(struct intel_digital_port *dig_port);
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void intel_tc_port_unlock(struct intel_digital_port *dig_port);
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void intel_tc_port_flush_work(struct intel_digital_port *dig_port);
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void intel_tc_port_get_link(struct intel_digital_port *dig_port,
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int required_lanes);
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void intel_tc_port_put_link(struct intel_digital_port *dig_port);
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bool intel_tc_port_ref_held(struct intel_digital_port *dig_port);
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void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy);
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bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port);
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#endif /* __INTEL_TC_H__ */
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