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![Jani Nikula](/assets/img/avatar_default.png)
Include it only in files that use it. Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/14edab4a193ea3f73f387a88e3836c8555401871.1644507885.git.jani.nikula@intel.com
1232 lines
31 KiB
C
1232 lines
31 KiB
C
/*
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* Copyright © 2008-2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*
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*/
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#include <linux/dma-fence-array.h>
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#include <linux/kthread.h>
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#include <linux/dma-resv.h>
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#include <linux/shmem_fs.h>
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#include <linux/slab.h>
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#include <linux/stop_machine.h>
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#include <linux/swap.h>
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#include <linux/pci.h>
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#include <linux/dma-buf.h>
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#include <linux/mman.h>
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#include <drm/drm_cache.h>
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#include <drm/drm_vma_manager.h>
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#include "display/intel_display.h"
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#include "display/intel_frontbuffer.h"
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#include "gem/i915_gem_clflush.h"
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#include "gem/i915_gem_context.h"
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#include "gem/i915_gem_ioctls.h"
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#include "gem/i915_gem_mman.h"
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#include "gem/i915_gem_pm.h"
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#include "gem/i915_gem_region.h"
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#include "gem/i915_gem_userptr.h"
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#include "gt/intel_engine_user.h"
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#include "gt/intel_gt.h"
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#include "gt/intel_gt_pm.h"
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#include "gt/intel_workarounds.h"
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#include "i915_drv.h"
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#include "i915_file_private.h"
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#include "i915_trace.h"
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#include "i915_vgpu.h"
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#include "intel_pm.h"
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static int
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insert_mappable_node(struct i915_ggtt *ggtt, struct drm_mm_node *node, u32 size)
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{
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int err;
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err = mutex_lock_interruptible(&ggtt->vm.mutex);
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if (err)
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return err;
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memset(node, 0, sizeof(*node));
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err = drm_mm_insert_node_in_range(&ggtt->vm.mm, node,
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size, 0, I915_COLOR_UNEVICTABLE,
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0, ggtt->mappable_end,
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DRM_MM_INSERT_LOW);
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mutex_unlock(&ggtt->vm.mutex);
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return err;
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}
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static void
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remove_mappable_node(struct i915_ggtt *ggtt, struct drm_mm_node *node)
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{
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mutex_lock(&ggtt->vm.mutex);
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drm_mm_remove_node(node);
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mutex_unlock(&ggtt->vm.mutex);
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}
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int
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i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct i915_ggtt *ggtt = &to_i915(dev)->ggtt;
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struct drm_i915_gem_get_aperture *args = data;
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struct i915_vma *vma;
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u64 pinned;
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if (mutex_lock_interruptible(&ggtt->vm.mutex))
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return -EINTR;
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pinned = ggtt->vm.reserved;
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list_for_each_entry(vma, &ggtt->vm.bound_list, vm_link)
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if (i915_vma_is_pinned(vma))
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pinned += vma->node.size;
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mutex_unlock(&ggtt->vm.mutex);
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args->aper_size = ggtt->vm.total;
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args->aper_available_size = args->aper_size - pinned;
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return 0;
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}
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int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
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unsigned long flags)
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{
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struct intel_runtime_pm *rpm = &to_i915(obj->base.dev)->runtime_pm;
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LIST_HEAD(still_in_list);
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intel_wakeref_t wakeref;
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struct i915_vma *vma;
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int ret;
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if (list_empty(&obj->vma.list))
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return 0;
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/*
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* As some machines use ACPI to handle runtime-resume callbacks, and
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* ACPI is quite kmalloc happy, we cannot resume beneath the vm->mutex
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* as they are required by the shrinker. Ergo, we wake the device up
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* first just in case.
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*/
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wakeref = intel_runtime_pm_get(rpm);
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try_again:
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ret = 0;
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spin_lock(&obj->vma.lock);
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while (!ret && (vma = list_first_entry_or_null(&obj->vma.list,
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struct i915_vma,
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obj_link))) {
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struct i915_address_space *vm = vma->vm;
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list_move_tail(&vma->obj_link, &still_in_list);
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if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK))
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continue;
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if (flags & I915_GEM_OBJECT_UNBIND_TEST) {
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ret = -EBUSY;
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break;
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}
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ret = -EAGAIN;
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if (!i915_vm_tryopen(vm))
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break;
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/* Prevent vma being freed by i915_vma_parked as we unbind */
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vma = __i915_vma_get(vma);
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spin_unlock(&obj->vma.lock);
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if (vma) {
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ret = -EBUSY;
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if (flags & I915_GEM_OBJECT_UNBIND_ACTIVE ||
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!i915_vma_is_active(vma)) {
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if (flags & I915_GEM_OBJECT_UNBIND_VM_TRYLOCK) {
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if (mutex_trylock(&vma->vm->mutex)) {
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ret = __i915_vma_unbind(vma);
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mutex_unlock(&vma->vm->mutex);
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} else {
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ret = -EBUSY;
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}
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} else {
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ret = i915_vma_unbind(vma);
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}
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}
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__i915_vma_put(vma);
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}
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i915_vm_close(vm);
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spin_lock(&obj->vma.lock);
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}
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list_splice_init(&still_in_list, &obj->vma.list);
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spin_unlock(&obj->vma.lock);
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if (ret == -EAGAIN && flags & I915_GEM_OBJECT_UNBIND_BARRIER) {
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rcu_barrier(); /* flush the i915_vm_release() */
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goto try_again;
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}
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intel_runtime_pm_put(rpm, wakeref);
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return ret;
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}
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static int
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shmem_pread(struct page *page, int offset, int len, char __user *user_data,
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bool needs_clflush)
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{
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char *vaddr;
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int ret;
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vaddr = kmap(page);
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if (needs_clflush)
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drm_clflush_virt_range(vaddr + offset, len);
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ret = __copy_to_user(user_data, vaddr + offset, len);
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kunmap(page);
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return ret ? -EFAULT : 0;
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}
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static int
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i915_gem_shmem_pread(struct drm_i915_gem_object *obj,
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struct drm_i915_gem_pread *args)
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{
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unsigned int needs_clflush;
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unsigned int idx, offset;
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char __user *user_data;
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u64 remain;
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int ret;
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ret = i915_gem_object_lock_interruptible(obj, NULL);
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if (ret)
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return ret;
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ret = i915_gem_object_pin_pages(obj);
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if (ret)
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goto err_unlock;
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ret = i915_gem_object_prepare_read(obj, &needs_clflush);
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if (ret)
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goto err_unpin;
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i915_gem_object_finish_access(obj);
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i915_gem_object_unlock(obj);
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remain = args->size;
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user_data = u64_to_user_ptr(args->data_ptr);
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offset = offset_in_page(args->offset);
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for (idx = args->offset >> PAGE_SHIFT; remain; idx++) {
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struct page *page = i915_gem_object_get_page(obj, idx);
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unsigned int length = min_t(u64, remain, PAGE_SIZE - offset);
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ret = shmem_pread(page, offset, length, user_data,
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needs_clflush);
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if (ret)
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break;
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remain -= length;
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user_data += length;
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offset = 0;
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}
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i915_gem_object_unpin_pages(obj);
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return ret;
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err_unpin:
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i915_gem_object_unpin_pages(obj);
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err_unlock:
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i915_gem_object_unlock(obj);
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return ret;
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}
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static inline bool
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gtt_user_read(struct io_mapping *mapping,
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loff_t base, int offset,
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char __user *user_data, int length)
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{
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void __iomem *vaddr;
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unsigned long unwritten;
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/* We can use the cpu mem copy function because this is X86. */
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vaddr = io_mapping_map_atomic_wc(mapping, base);
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unwritten = __copy_to_user_inatomic(user_data,
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(void __force *)vaddr + offset,
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length);
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io_mapping_unmap_atomic(vaddr);
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if (unwritten) {
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vaddr = io_mapping_map_wc(mapping, base, PAGE_SIZE);
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unwritten = copy_to_user(user_data,
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(void __force *)vaddr + offset,
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length);
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io_mapping_unmap(vaddr);
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}
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return unwritten;
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}
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static struct i915_vma *i915_gem_gtt_prepare(struct drm_i915_gem_object *obj,
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struct drm_mm_node *node,
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bool write)
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{
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struct drm_i915_private *i915 = to_i915(obj->base.dev);
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struct i915_ggtt *ggtt = &i915->ggtt;
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struct i915_vma *vma;
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struct i915_gem_ww_ctx ww;
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int ret;
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i915_gem_ww_ctx_init(&ww, true);
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retry:
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vma = ERR_PTR(-ENODEV);
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ret = i915_gem_object_lock(obj, &ww);
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if (ret)
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goto err_ww;
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ret = i915_gem_object_set_to_gtt_domain(obj, write);
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if (ret)
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goto err_ww;
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if (!i915_gem_object_is_tiled(obj))
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vma = i915_gem_object_ggtt_pin_ww(obj, &ww, NULL, 0, 0,
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PIN_MAPPABLE |
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PIN_NONBLOCK /* NOWARN */ |
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PIN_NOEVICT);
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if (vma == ERR_PTR(-EDEADLK)) {
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ret = -EDEADLK;
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goto err_ww;
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} else if (!IS_ERR(vma)) {
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node->start = i915_ggtt_offset(vma);
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node->flags = 0;
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} else {
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ret = insert_mappable_node(ggtt, node, PAGE_SIZE);
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if (ret)
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goto err_ww;
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GEM_BUG_ON(!drm_mm_node_allocated(node));
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vma = NULL;
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}
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ret = i915_gem_object_pin_pages(obj);
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if (ret) {
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if (drm_mm_node_allocated(node)) {
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ggtt->vm.clear_range(&ggtt->vm, node->start, node->size);
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remove_mappable_node(ggtt, node);
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} else {
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i915_vma_unpin(vma);
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}
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}
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err_ww:
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if (ret == -EDEADLK) {
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ret = i915_gem_ww_ctx_backoff(&ww);
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if (!ret)
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goto retry;
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}
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i915_gem_ww_ctx_fini(&ww);
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return ret ? ERR_PTR(ret) : vma;
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}
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static void i915_gem_gtt_cleanup(struct drm_i915_gem_object *obj,
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struct drm_mm_node *node,
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struct i915_vma *vma)
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{
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struct drm_i915_private *i915 = to_i915(obj->base.dev);
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struct i915_ggtt *ggtt = &i915->ggtt;
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i915_gem_object_unpin_pages(obj);
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if (drm_mm_node_allocated(node)) {
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ggtt->vm.clear_range(&ggtt->vm, node->start, node->size);
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remove_mappable_node(ggtt, node);
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} else {
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i915_vma_unpin(vma);
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}
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}
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static int
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i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
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const struct drm_i915_gem_pread *args)
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{
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struct drm_i915_private *i915 = to_i915(obj->base.dev);
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struct i915_ggtt *ggtt = &i915->ggtt;
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intel_wakeref_t wakeref;
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struct drm_mm_node node;
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void __user *user_data;
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struct i915_vma *vma;
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u64 remain, offset;
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int ret = 0;
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wakeref = intel_runtime_pm_get(&i915->runtime_pm);
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vma = i915_gem_gtt_prepare(obj, &node, false);
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if (IS_ERR(vma)) {
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ret = PTR_ERR(vma);
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goto out_rpm;
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}
|
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|
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user_data = u64_to_user_ptr(args->data_ptr);
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remain = args->size;
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offset = args->offset;
|
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|
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while (remain > 0) {
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/* Operation in this page
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*
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* page_base = page offset within aperture
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* page_offset = offset within page
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* page_length = bytes to copy for this page
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*/
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u32 page_base = node.start;
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unsigned page_offset = offset_in_page(offset);
|
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unsigned page_length = PAGE_SIZE - page_offset;
|
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page_length = remain < page_length ? remain : page_length;
|
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if (drm_mm_node_allocated(&node)) {
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ggtt->vm.insert_page(&ggtt->vm,
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i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
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node.start, I915_CACHE_NONE, 0);
|
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} else {
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page_base += offset & PAGE_MASK;
|
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}
|
|
|
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if (gtt_user_read(&ggtt->iomap, page_base, page_offset,
|
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user_data, page_length)) {
|
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ret = -EFAULT;
|
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break;
|
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}
|
|
|
|
remain -= page_length;
|
|
user_data += page_length;
|
|
offset += page_length;
|
|
}
|
|
|
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i915_gem_gtt_cleanup(obj, &node, vma);
|
|
out_rpm:
|
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intel_runtime_pm_put(&i915->runtime_pm, wakeref);
|
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return ret;
|
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}
|
|
|
|
/**
|
|
* Reads data from the object referenced by handle.
|
|
* @dev: drm device pointer
|
|
* @data: ioctl data blob
|
|
* @file: drm file pointer
|
|
*
|
|
* On error, the contents of *data are undefined.
|
|
*/
|
|
int
|
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i915_gem_pread_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_i915_private *i915 = to_i915(dev);
|
|
struct drm_i915_gem_pread *args = data;
|
|
struct drm_i915_gem_object *obj;
|
|
int ret;
|
|
|
|
/* PREAD is disallowed for all platforms after TGL-LP. This also
|
|
* covers all platforms with local memory.
|
|
*/
|
|
if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915))
|
|
return -EOPNOTSUPP;
|
|
|
|
if (args->size == 0)
|
|
return 0;
|
|
|
|
if (!access_ok(u64_to_user_ptr(args->data_ptr),
|
|
args->size))
|
|
return -EFAULT;
|
|
|
|
obj = i915_gem_object_lookup(file, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
/* Bounds check source. */
|
|
if (range_overflows_t(u64, args->offset, args->size, obj->base.size)) {
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
trace_i915_gem_object_pread(obj, args->offset, args->size);
|
|
ret = -ENODEV;
|
|
if (obj->ops->pread)
|
|
ret = obj->ops->pread(obj, args);
|
|
if (ret != -ENODEV)
|
|
goto out;
|
|
|
|
ret = i915_gem_object_wait(obj,
|
|
I915_WAIT_INTERRUPTIBLE,
|
|
MAX_SCHEDULE_TIMEOUT);
|
|
if (ret)
|
|
goto out;
|
|
|
|
ret = i915_gem_shmem_pread(obj, args);
|
|
if (ret == -EFAULT || ret == -ENODEV)
|
|
ret = i915_gem_gtt_pread(obj, args);
|
|
|
|
out:
|
|
i915_gem_object_put(obj);
|
|
return ret;
|
|
}
|
|
|
|
/* This is the fast write path which cannot handle
|
|
* page faults in the source data
|
|
*/
|
|
|
|
static inline bool
|
|
ggtt_write(struct io_mapping *mapping,
|
|
loff_t base, int offset,
|
|
char __user *user_data, int length)
|
|
{
|
|
void __iomem *vaddr;
|
|
unsigned long unwritten;
|
|
|
|
/* We can use the cpu mem copy function because this is X86. */
|
|
vaddr = io_mapping_map_atomic_wc(mapping, base);
|
|
unwritten = __copy_from_user_inatomic_nocache((void __force *)vaddr + offset,
|
|
user_data, length);
|
|
io_mapping_unmap_atomic(vaddr);
|
|
if (unwritten) {
|
|
vaddr = io_mapping_map_wc(mapping, base, PAGE_SIZE);
|
|
unwritten = copy_from_user((void __force *)vaddr + offset,
|
|
user_data, length);
|
|
io_mapping_unmap(vaddr);
|
|
}
|
|
|
|
return unwritten;
|
|
}
|
|
|
|
/**
|
|
* This is the fast pwrite path, where we copy the data directly from the
|
|
* user into the GTT, uncached.
|
|
* @obj: i915 GEM object
|
|
* @args: pwrite arguments structure
|
|
*/
|
|
static int
|
|
i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
|
|
const struct drm_i915_gem_pwrite *args)
|
|
{
|
|
struct drm_i915_private *i915 = to_i915(obj->base.dev);
|
|
struct i915_ggtt *ggtt = &i915->ggtt;
|
|
struct intel_runtime_pm *rpm = &i915->runtime_pm;
|
|
intel_wakeref_t wakeref;
|
|
struct drm_mm_node node;
|
|
struct i915_vma *vma;
|
|
u64 remain, offset;
|
|
void __user *user_data;
|
|
int ret = 0;
|
|
|
|
if (i915_gem_object_has_struct_page(obj)) {
|
|
/*
|
|
* Avoid waking the device up if we can fallback, as
|
|
* waking/resuming is very slow (worst-case 10-100 ms
|
|
* depending on PCI sleeps and our own resume time).
|
|
* This easily dwarfs any performance advantage from
|
|
* using the cache bypass of indirect GGTT access.
|
|
*/
|
|
wakeref = intel_runtime_pm_get_if_in_use(rpm);
|
|
if (!wakeref)
|
|
return -EFAULT;
|
|
} else {
|
|
/* No backing pages, no fallback, we must force GGTT access */
|
|
wakeref = intel_runtime_pm_get(rpm);
|
|
}
|
|
|
|
vma = i915_gem_gtt_prepare(obj, &node, true);
|
|
if (IS_ERR(vma)) {
|
|
ret = PTR_ERR(vma);
|
|
goto out_rpm;
|
|
}
|
|
|
|
i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU);
|
|
|
|
user_data = u64_to_user_ptr(args->data_ptr);
|
|
offset = args->offset;
|
|
remain = args->size;
|
|
while (remain) {
|
|
/* Operation in this page
|
|
*
|
|
* page_base = page offset within aperture
|
|
* page_offset = offset within page
|
|
* page_length = bytes to copy for this page
|
|
*/
|
|
u32 page_base = node.start;
|
|
unsigned int page_offset = offset_in_page(offset);
|
|
unsigned int page_length = PAGE_SIZE - page_offset;
|
|
page_length = remain < page_length ? remain : page_length;
|
|
if (drm_mm_node_allocated(&node)) {
|
|
/* flush the write before we modify the GGTT */
|
|
intel_gt_flush_ggtt_writes(ggtt->vm.gt);
|
|
ggtt->vm.insert_page(&ggtt->vm,
|
|
i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
|
|
node.start, I915_CACHE_NONE, 0);
|
|
wmb(); /* flush modifications to the GGTT (insert_page) */
|
|
} else {
|
|
page_base += offset & PAGE_MASK;
|
|
}
|
|
/* If we get a fault while copying data, then (presumably) our
|
|
* source page isn't available. Return the error and we'll
|
|
* retry in the slow path.
|
|
* If the object is non-shmem backed, we retry again with the
|
|
* path that handles page fault.
|
|
*/
|
|
if (ggtt_write(&ggtt->iomap, page_base, page_offset,
|
|
user_data, page_length)) {
|
|
ret = -EFAULT;
|
|
break;
|
|
}
|
|
|
|
remain -= page_length;
|
|
user_data += page_length;
|
|
offset += page_length;
|
|
}
|
|
|
|
intel_gt_flush_ggtt_writes(ggtt->vm.gt);
|
|
i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU);
|
|
|
|
i915_gem_gtt_cleanup(obj, &node, vma);
|
|
out_rpm:
|
|
intel_runtime_pm_put(rpm, wakeref);
|
|
return ret;
|
|
}
|
|
|
|
/* Per-page copy function for the shmem pwrite fastpath.
|
|
* Flushes invalid cachelines before writing to the target if
|
|
* needs_clflush_before is set and flushes out any written cachelines after
|
|
* writing if needs_clflush is set.
|
|
*/
|
|
static int
|
|
shmem_pwrite(struct page *page, int offset, int len, char __user *user_data,
|
|
bool needs_clflush_before,
|
|
bool needs_clflush_after)
|
|
{
|
|
char *vaddr;
|
|
int ret;
|
|
|
|
vaddr = kmap(page);
|
|
|
|
if (needs_clflush_before)
|
|
drm_clflush_virt_range(vaddr + offset, len);
|
|
|
|
ret = __copy_from_user(vaddr + offset, user_data, len);
|
|
if (!ret && needs_clflush_after)
|
|
drm_clflush_virt_range(vaddr + offset, len);
|
|
|
|
kunmap(page);
|
|
|
|
return ret ? -EFAULT : 0;
|
|
}
|
|
|
|
static int
|
|
i915_gem_shmem_pwrite(struct drm_i915_gem_object *obj,
|
|
const struct drm_i915_gem_pwrite *args)
|
|
{
|
|
unsigned int partial_cacheline_write;
|
|
unsigned int needs_clflush;
|
|
unsigned int offset, idx;
|
|
void __user *user_data;
|
|
u64 remain;
|
|
int ret;
|
|
|
|
ret = i915_gem_object_lock_interruptible(obj, NULL);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = i915_gem_object_pin_pages(obj);
|
|
if (ret)
|
|
goto err_unlock;
|
|
|
|
ret = i915_gem_object_prepare_write(obj, &needs_clflush);
|
|
if (ret)
|
|
goto err_unpin;
|
|
|
|
i915_gem_object_finish_access(obj);
|
|
i915_gem_object_unlock(obj);
|
|
|
|
/* If we don't overwrite a cacheline completely we need to be
|
|
* careful to have up-to-date data by first clflushing. Don't
|
|
* overcomplicate things and flush the entire patch.
|
|
*/
|
|
partial_cacheline_write = 0;
|
|
if (needs_clflush & CLFLUSH_BEFORE)
|
|
partial_cacheline_write = boot_cpu_data.x86_clflush_size - 1;
|
|
|
|
user_data = u64_to_user_ptr(args->data_ptr);
|
|
remain = args->size;
|
|
offset = offset_in_page(args->offset);
|
|
for (idx = args->offset >> PAGE_SHIFT; remain; idx++) {
|
|
struct page *page = i915_gem_object_get_page(obj, idx);
|
|
unsigned int length = min_t(u64, remain, PAGE_SIZE - offset);
|
|
|
|
ret = shmem_pwrite(page, offset, length, user_data,
|
|
(offset | length) & partial_cacheline_write,
|
|
needs_clflush & CLFLUSH_AFTER);
|
|
if (ret)
|
|
break;
|
|
|
|
remain -= length;
|
|
user_data += length;
|
|
offset = 0;
|
|
}
|
|
|
|
i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU);
|
|
|
|
i915_gem_object_unpin_pages(obj);
|
|
return ret;
|
|
|
|
err_unpin:
|
|
i915_gem_object_unpin_pages(obj);
|
|
err_unlock:
|
|
i915_gem_object_unlock(obj);
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* Writes data to the object referenced by handle.
|
|
* @dev: drm device
|
|
* @data: ioctl data blob
|
|
* @file: drm file
|
|
*
|
|
* On error, the contents of the buffer that were to be modified are undefined.
|
|
*/
|
|
int
|
|
i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_i915_private *i915 = to_i915(dev);
|
|
struct drm_i915_gem_pwrite *args = data;
|
|
struct drm_i915_gem_object *obj;
|
|
int ret;
|
|
|
|
/* PWRITE is disallowed for all platforms after TGL-LP. This also
|
|
* covers all platforms with local memory.
|
|
*/
|
|
if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915))
|
|
return -EOPNOTSUPP;
|
|
|
|
if (args->size == 0)
|
|
return 0;
|
|
|
|
if (!access_ok(u64_to_user_ptr(args->data_ptr), args->size))
|
|
return -EFAULT;
|
|
|
|
obj = i915_gem_object_lookup(file, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
/* Bounds check destination. */
|
|
if (range_overflows_t(u64, args->offset, args->size, obj->base.size)) {
|
|
ret = -EINVAL;
|
|
goto err;
|
|
}
|
|
|
|
/* Writes not allowed into this read-only object */
|
|
if (i915_gem_object_is_readonly(obj)) {
|
|
ret = -EINVAL;
|
|
goto err;
|
|
}
|
|
|
|
trace_i915_gem_object_pwrite(obj, args->offset, args->size);
|
|
|
|
ret = -ENODEV;
|
|
if (obj->ops->pwrite)
|
|
ret = obj->ops->pwrite(obj, args);
|
|
if (ret != -ENODEV)
|
|
goto err;
|
|
|
|
ret = i915_gem_object_wait(obj,
|
|
I915_WAIT_INTERRUPTIBLE |
|
|
I915_WAIT_ALL,
|
|
MAX_SCHEDULE_TIMEOUT);
|
|
if (ret)
|
|
goto err;
|
|
|
|
ret = -EFAULT;
|
|
/* We can only do the GTT pwrite on untiled buffers, as otherwise
|
|
* it would end up going through the fenced access, and we'll get
|
|
* different detiling behavior between reading and writing.
|
|
* pread/pwrite currently are reading and writing from the CPU
|
|
* perspective, requiring manual detiling by the client.
|
|
*/
|
|
if (!i915_gem_object_has_struct_page(obj) ||
|
|
i915_gem_cpu_write_needs_clflush(obj))
|
|
/* Note that the gtt paths might fail with non-page-backed user
|
|
* pointers (e.g. gtt mappings when moving data between
|
|
* textures). Fallback to the shmem path in that case.
|
|
*/
|
|
ret = i915_gem_gtt_pwrite_fast(obj, args);
|
|
|
|
if (ret == -EFAULT || ret == -ENOSPC) {
|
|
if (i915_gem_object_has_struct_page(obj))
|
|
ret = i915_gem_shmem_pwrite(obj, args);
|
|
}
|
|
|
|
err:
|
|
i915_gem_object_put(obj);
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* Called when user space has done writes to this buffer
|
|
* @dev: drm device
|
|
* @data: ioctl data blob
|
|
* @file: drm file
|
|
*/
|
|
int
|
|
i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_i915_gem_sw_finish *args = data;
|
|
struct drm_i915_gem_object *obj;
|
|
|
|
obj = i915_gem_object_lookup(file, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
/*
|
|
* Proxy objects are barred from CPU access, so there is no
|
|
* need to ban sw_finish as it is a nop.
|
|
*/
|
|
|
|
/* Pinned buffers may be scanout, so flush the cache */
|
|
i915_gem_object_flush_if_display(obj);
|
|
i915_gem_object_put(obj);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void i915_gem_runtime_suspend(struct drm_i915_private *i915)
|
|
{
|
|
struct drm_i915_gem_object *obj, *on;
|
|
int i;
|
|
|
|
/*
|
|
* Only called during RPM suspend. All users of the userfault_list
|
|
* must be holding an RPM wakeref to ensure that this can not
|
|
* run concurrently with themselves (and use the struct_mutex for
|
|
* protection between themselves).
|
|
*/
|
|
|
|
list_for_each_entry_safe(obj, on,
|
|
&i915->ggtt.userfault_list, userfault_link)
|
|
__i915_gem_object_release_mmap_gtt(obj);
|
|
|
|
/*
|
|
* The fence will be lost when the device powers down. If any were
|
|
* in use by hardware (i.e. they are pinned), we should not be powering
|
|
* down! All other fences will be reacquired by the user upon waking.
|
|
*/
|
|
for (i = 0; i < i915->ggtt.num_fences; i++) {
|
|
struct i915_fence_reg *reg = &i915->ggtt.fence_regs[i];
|
|
|
|
/*
|
|
* Ideally we want to assert that the fence register is not
|
|
* live at this point (i.e. that no piece of code will be
|
|
* trying to write through fence + GTT, as that both violates
|
|
* our tracking of activity and associated locking/barriers,
|
|
* but also is illegal given that the hw is powered down).
|
|
*
|
|
* Previously we used reg->pin_count as a "liveness" indicator.
|
|
* That is not sufficient, and we need a more fine-grained
|
|
* tool if we want to have a sanity check here.
|
|
*/
|
|
|
|
if (!reg->vma)
|
|
continue;
|
|
|
|
GEM_BUG_ON(i915_vma_has_userfault(reg->vma));
|
|
reg->dirty = true;
|
|
}
|
|
}
|
|
|
|
static void discard_ggtt_vma(struct i915_vma *vma)
|
|
{
|
|
struct drm_i915_gem_object *obj = vma->obj;
|
|
|
|
spin_lock(&obj->vma.lock);
|
|
if (!RB_EMPTY_NODE(&vma->obj_node)) {
|
|
rb_erase(&vma->obj_node, &obj->vma.tree);
|
|
RB_CLEAR_NODE(&vma->obj_node);
|
|
}
|
|
spin_unlock(&obj->vma.lock);
|
|
}
|
|
|
|
struct i915_vma *
|
|
i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj,
|
|
struct i915_gem_ww_ctx *ww,
|
|
const struct i915_ggtt_view *view,
|
|
u64 size, u64 alignment, u64 flags)
|
|
{
|
|
struct drm_i915_private *i915 = to_i915(obj->base.dev);
|
|
struct i915_ggtt *ggtt = &i915->ggtt;
|
|
struct i915_vma *vma;
|
|
int ret;
|
|
|
|
GEM_WARN_ON(!ww);
|
|
|
|
if (flags & PIN_MAPPABLE &&
|
|
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
|
|
/*
|
|
* If the required space is larger than the available
|
|
* aperture, we will not able to find a slot for the
|
|
* object and unbinding the object now will be in
|
|
* vain. Worse, doing so may cause us to ping-pong
|
|
* the object in and out of the Global GTT and
|
|
* waste a lot of cycles under the mutex.
|
|
*/
|
|
if (obj->base.size > ggtt->mappable_end)
|
|
return ERR_PTR(-E2BIG);
|
|
|
|
/*
|
|
* If NONBLOCK is set the caller is optimistically
|
|
* trying to cache the full object within the mappable
|
|
* aperture, and *must* have a fallback in place for
|
|
* situations where we cannot bind the object. We
|
|
* can be a little more lax here and use the fallback
|
|
* more often to avoid costly migrations of ourselves
|
|
* and other objects within the aperture.
|
|
*
|
|
* Half-the-aperture is used as a simple heuristic.
|
|
* More interesting would to do search for a free
|
|
* block prior to making the commitment to unbind.
|
|
* That caters for the self-harm case, and with a
|
|
* little more heuristics (e.g. NOFAULT, NOEVICT)
|
|
* we could try to minimise harm to others.
|
|
*/
|
|
if (flags & PIN_NONBLOCK &&
|
|
obj->base.size > ggtt->mappable_end / 2)
|
|
return ERR_PTR(-ENOSPC);
|
|
}
|
|
|
|
new_vma:
|
|
vma = i915_vma_instance(obj, &ggtt->vm, view);
|
|
if (IS_ERR(vma))
|
|
return vma;
|
|
|
|
if (i915_vma_misplaced(vma, size, alignment, flags)) {
|
|
if (flags & PIN_NONBLOCK) {
|
|
if (i915_vma_is_pinned(vma) || i915_vma_is_active(vma))
|
|
return ERR_PTR(-ENOSPC);
|
|
|
|
if (flags & PIN_MAPPABLE &&
|
|
vma->fence_size > ggtt->mappable_end / 2)
|
|
return ERR_PTR(-ENOSPC);
|
|
}
|
|
|
|
if (i915_vma_is_pinned(vma) || i915_vma_is_active(vma)) {
|
|
discard_ggtt_vma(vma);
|
|
goto new_vma;
|
|
}
|
|
|
|
ret = i915_vma_unbind(vma);
|
|
if (ret)
|
|
return ERR_PTR(ret);
|
|
}
|
|
|
|
ret = i915_vma_pin_ww(vma, ww, size, alignment, flags | PIN_GLOBAL);
|
|
|
|
if (ret)
|
|
return ERR_PTR(ret);
|
|
|
|
if (vma->fence && !i915_gem_object_is_tiled(obj)) {
|
|
mutex_lock(&ggtt->vm.mutex);
|
|
i915_vma_revoke_fence(vma);
|
|
mutex_unlock(&ggtt->vm.mutex);
|
|
}
|
|
|
|
ret = i915_vma_wait_for_bind(vma);
|
|
if (ret) {
|
|
i915_vma_unpin(vma);
|
|
return ERR_PTR(ret);
|
|
}
|
|
|
|
return vma;
|
|
}
|
|
|
|
struct i915_vma * __must_check
|
|
i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
|
|
const struct i915_ggtt_view *view,
|
|
u64 size, u64 alignment, u64 flags)
|
|
{
|
|
struct i915_gem_ww_ctx ww;
|
|
struct i915_vma *ret;
|
|
int err;
|
|
|
|
for_i915_gem_ww(&ww, err, true) {
|
|
err = i915_gem_object_lock(obj, &ww);
|
|
if (err)
|
|
continue;
|
|
|
|
ret = i915_gem_object_ggtt_pin_ww(obj, &ww, view, size,
|
|
alignment, flags);
|
|
if (IS_ERR(ret))
|
|
err = PTR_ERR(ret);
|
|
}
|
|
|
|
return err ? ERR_PTR(err) : ret;
|
|
}
|
|
|
|
int
|
|
i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *file_priv)
|
|
{
|
|
struct drm_i915_private *i915 = to_i915(dev);
|
|
struct drm_i915_gem_madvise *args = data;
|
|
struct drm_i915_gem_object *obj;
|
|
int err;
|
|
|
|
switch (args->madv) {
|
|
case I915_MADV_DONTNEED:
|
|
case I915_MADV_WILLNEED:
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
obj = i915_gem_object_lookup(file_priv, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
err = i915_gem_object_lock_interruptible(obj, NULL);
|
|
if (err)
|
|
goto out;
|
|
|
|
if (i915_gem_object_has_pages(obj) &&
|
|
i915_gem_object_is_tiled(obj) &&
|
|
i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
|
|
if (obj->mm.madv == I915_MADV_WILLNEED) {
|
|
GEM_BUG_ON(!i915_gem_object_has_tiling_quirk(obj));
|
|
i915_gem_object_clear_tiling_quirk(obj);
|
|
i915_gem_object_make_shrinkable(obj);
|
|
}
|
|
if (args->madv == I915_MADV_WILLNEED) {
|
|
GEM_BUG_ON(i915_gem_object_has_tiling_quirk(obj));
|
|
i915_gem_object_make_unshrinkable(obj);
|
|
i915_gem_object_set_tiling_quirk(obj);
|
|
}
|
|
}
|
|
|
|
if (obj->mm.madv != __I915_MADV_PURGED) {
|
|
obj->mm.madv = args->madv;
|
|
if (obj->ops->adjust_lru)
|
|
obj->ops->adjust_lru(obj);
|
|
}
|
|
|
|
if (i915_gem_object_has_pages(obj) ||
|
|
i915_gem_object_has_self_managed_shrink_list(obj)) {
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&i915->mm.obj_lock, flags);
|
|
if (!list_empty(&obj->mm.link)) {
|
|
struct list_head *list;
|
|
|
|
if (obj->mm.madv != I915_MADV_WILLNEED)
|
|
list = &i915->mm.purge_list;
|
|
else
|
|
list = &i915->mm.shrink_list;
|
|
list_move_tail(&obj->mm.link, list);
|
|
|
|
}
|
|
spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
|
|
}
|
|
|
|
/* if the object is no longer attached, discard its backing storage */
|
|
if (obj->mm.madv == I915_MADV_DONTNEED &&
|
|
!i915_gem_object_has_pages(obj))
|
|
i915_gem_object_truncate(obj);
|
|
|
|
args->retained = obj->mm.madv != __I915_MADV_PURGED;
|
|
|
|
i915_gem_object_unlock(obj);
|
|
out:
|
|
i915_gem_object_put(obj);
|
|
return err;
|
|
}
|
|
|
|
int i915_gem_init(struct drm_i915_private *dev_priv)
|
|
{
|
|
int ret;
|
|
|
|
/* We need to fallback to 4K pages if host doesn't support huge gtt. */
|
|
if (intel_vgpu_active(dev_priv) && !intel_vgpu_has_huge_gtt(dev_priv))
|
|
mkwrite_device_info(dev_priv)->page_sizes =
|
|
I915_GTT_PAGE_SIZE_4K;
|
|
|
|
ret = i915_gem_init_userptr(dev_priv);
|
|
if (ret)
|
|
return ret;
|
|
|
|
intel_uc_fetch_firmwares(&to_gt(dev_priv)->uc);
|
|
intel_wopcm_init(&dev_priv->wopcm);
|
|
|
|
ret = i915_init_ggtt(dev_priv);
|
|
if (ret) {
|
|
GEM_BUG_ON(ret == -EIO);
|
|
goto err_unlock;
|
|
}
|
|
|
|
/*
|
|
* Despite its name intel_init_clock_gating applies both display
|
|
* clock gating workarounds; GT mmio workarounds and the occasional
|
|
* GT power context workaround. Worse, sometimes it includes a context
|
|
* register workaround which we need to apply before we record the
|
|
* default HW state for all contexts.
|
|
*
|
|
* FIXME: break up the workarounds and apply them at the right time!
|
|
*/
|
|
intel_init_clock_gating(dev_priv);
|
|
|
|
ret = intel_gt_init(to_gt(dev_priv));
|
|
if (ret)
|
|
goto err_unlock;
|
|
|
|
return 0;
|
|
|
|
/*
|
|
* Unwinding is complicated by that we want to handle -EIO to mean
|
|
* disable GPU submission but keep KMS alive. We want to mark the
|
|
* HW as irrevisibly wedged, but keep enough state around that the
|
|
* driver doesn't explode during runtime.
|
|
*/
|
|
err_unlock:
|
|
i915_gem_drain_workqueue(dev_priv);
|
|
|
|
if (ret != -EIO)
|
|
intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
|
|
|
|
if (ret == -EIO) {
|
|
/*
|
|
* Allow engines or uC initialisation to fail by marking the GPU
|
|
* as wedged. But we only want to do this when the GPU is angry,
|
|
* for all other failure, such as an allocation failure, bail.
|
|
*/
|
|
if (!intel_gt_is_wedged(to_gt(dev_priv))) {
|
|
i915_probe_error(dev_priv,
|
|
"Failed to initialize GPU, declaring it wedged!\n");
|
|
intel_gt_set_wedged(to_gt(dev_priv));
|
|
}
|
|
|
|
/* Minimal basic recovery for KMS */
|
|
ret = i915_ggtt_enable_hw(dev_priv);
|
|
i915_ggtt_resume(&dev_priv->ggtt);
|
|
intel_init_clock_gating(dev_priv);
|
|
}
|
|
|
|
i915_gem_drain_freed_objects(dev_priv);
|
|
|
|
return ret;
|
|
}
|
|
|
|
void i915_gem_driver_register(struct drm_i915_private *i915)
|
|
{
|
|
i915_gem_driver_register__shrinker(i915);
|
|
|
|
intel_engines_driver_register(i915);
|
|
}
|
|
|
|
void i915_gem_driver_unregister(struct drm_i915_private *i915)
|
|
{
|
|
i915_gem_driver_unregister__shrinker(i915);
|
|
}
|
|
|
|
void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
|
|
{
|
|
intel_wakeref_auto_fini(&dev_priv->ggtt.userfault_wakeref);
|
|
|
|
i915_gem_suspend_late(dev_priv);
|
|
intel_gt_driver_remove(to_gt(dev_priv));
|
|
dev_priv->uabi_engines = RB_ROOT;
|
|
|
|
/* Flush any outstanding unpin_work. */
|
|
i915_gem_drain_workqueue(dev_priv);
|
|
|
|
i915_gem_drain_freed_objects(dev_priv);
|
|
}
|
|
|
|
void i915_gem_driver_release(struct drm_i915_private *dev_priv)
|
|
{
|
|
intel_gt_driver_release(to_gt(dev_priv));
|
|
|
|
intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
|
|
|
|
i915_gem_drain_freed_objects(dev_priv);
|
|
|
|
drm_WARN_ON(&dev_priv->drm, !list_empty(&dev_priv->gem.contexts.list));
|
|
}
|
|
|
|
static void i915_gem_init__mm(struct drm_i915_private *i915)
|
|
{
|
|
spin_lock_init(&i915->mm.obj_lock);
|
|
|
|
init_llist_head(&i915->mm.free_list);
|
|
|
|
INIT_LIST_HEAD(&i915->mm.purge_list);
|
|
INIT_LIST_HEAD(&i915->mm.shrink_list);
|
|
|
|
i915_gem_init__objects(i915);
|
|
}
|
|
|
|
void i915_gem_init_early(struct drm_i915_private *dev_priv)
|
|
{
|
|
i915_gem_init__mm(dev_priv);
|
|
i915_gem_init__contexts(dev_priv);
|
|
|
|
spin_lock_init(&dev_priv->fb_tracking.lock);
|
|
}
|
|
|
|
void i915_gem_cleanup_early(struct drm_i915_private *dev_priv)
|
|
{
|
|
i915_gem_drain_freed_objects(dev_priv);
|
|
GEM_BUG_ON(!llist_empty(&dev_priv->mm.free_list));
|
|
GEM_BUG_ON(atomic_read(&dev_priv->mm.free_count));
|
|
drm_WARN_ON(&dev_priv->drm, dev_priv->mm.shrink_count);
|
|
}
|
|
|
|
int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
|
|
{
|
|
struct drm_i915_file_private *file_priv;
|
|
int ret;
|
|
|
|
DRM_DEBUG("\n");
|
|
|
|
file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
|
|
if (!file_priv)
|
|
return -ENOMEM;
|
|
|
|
file->driver_priv = file_priv;
|
|
file_priv->dev_priv = i915;
|
|
file_priv->file = file;
|
|
|
|
file_priv->bsd_engine = -1;
|
|
file_priv->hang_timestamp = jiffies;
|
|
|
|
ret = i915_gem_context_open(i915, file);
|
|
if (ret)
|
|
kfree(file_priv);
|
|
|
|
return ret;
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
|
|
#include "selftests/mock_gem_device.c"
|
|
#include "selftests/i915_gem.c"
|
|
#endif
|