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![Wolfram Sang](/assets/img/avatar_default.png)
We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
461 lines
11 KiB
C
461 lines
11 KiB
C
/*
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* Copyright (C) 2014-2017 Broadcom
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/sysfs.h>
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#include <linux/io.h>
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#include <linux/string.h>
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#include <linux/device.h>
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#include <linux/list.h>
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#include <linux/of.h>
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#include <linux/bitops.h>
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#include <linux/pm.h>
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#include <linux/kernel.h>
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#include <linux/kdebug.h>
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#include <linux/notifier.h>
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#ifdef CONFIG_MIPS
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#include <asm/traps.h>
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#endif
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#define ARB_ERR_CAP_CLEAR (1 << 0)
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#define ARB_ERR_CAP_STATUS_TIMEOUT (1 << 12)
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#define ARB_ERR_CAP_STATUS_TEA (1 << 11)
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#define ARB_ERR_CAP_STATUS_WRITE (1 << 1)
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#define ARB_ERR_CAP_STATUS_VALID (1 << 0)
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enum {
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ARB_TIMER,
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ARB_ERR_CAP_CLR,
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ARB_ERR_CAP_HI_ADDR,
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ARB_ERR_CAP_ADDR,
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ARB_ERR_CAP_STATUS,
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ARB_ERR_CAP_MASTER,
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};
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static const int gisb_offsets_bcm7038[] = {
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[ARB_TIMER] = 0x00c,
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[ARB_ERR_CAP_CLR] = 0x0c4,
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[ARB_ERR_CAP_HI_ADDR] = -1,
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[ARB_ERR_CAP_ADDR] = 0x0c8,
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[ARB_ERR_CAP_STATUS] = 0x0d0,
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[ARB_ERR_CAP_MASTER] = -1,
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};
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static const int gisb_offsets_bcm7278[] = {
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[ARB_TIMER] = 0x008,
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[ARB_ERR_CAP_CLR] = 0x7f8,
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[ARB_ERR_CAP_HI_ADDR] = -1,
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[ARB_ERR_CAP_ADDR] = 0x7e0,
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[ARB_ERR_CAP_STATUS] = 0x7f0,
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[ARB_ERR_CAP_MASTER] = 0x7f4,
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};
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static const int gisb_offsets_bcm7400[] = {
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[ARB_TIMER] = 0x00c,
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[ARB_ERR_CAP_CLR] = 0x0c8,
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[ARB_ERR_CAP_HI_ADDR] = -1,
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[ARB_ERR_CAP_ADDR] = 0x0cc,
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[ARB_ERR_CAP_STATUS] = 0x0d4,
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[ARB_ERR_CAP_MASTER] = 0x0d8,
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};
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static const int gisb_offsets_bcm7435[] = {
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[ARB_TIMER] = 0x00c,
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[ARB_ERR_CAP_CLR] = 0x168,
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[ARB_ERR_CAP_HI_ADDR] = -1,
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[ARB_ERR_CAP_ADDR] = 0x16c,
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[ARB_ERR_CAP_STATUS] = 0x174,
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[ARB_ERR_CAP_MASTER] = 0x178,
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};
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static const int gisb_offsets_bcm7445[] = {
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[ARB_TIMER] = 0x008,
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[ARB_ERR_CAP_CLR] = 0x7e4,
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[ARB_ERR_CAP_HI_ADDR] = 0x7e8,
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[ARB_ERR_CAP_ADDR] = 0x7ec,
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[ARB_ERR_CAP_STATUS] = 0x7f4,
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[ARB_ERR_CAP_MASTER] = 0x7f8,
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};
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struct brcmstb_gisb_arb_device {
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void __iomem *base;
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const int *gisb_offsets;
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bool big_endian;
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struct mutex lock;
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struct list_head next;
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u32 valid_mask;
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const char *master_names[sizeof(u32) * BITS_PER_BYTE];
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u32 saved_timeout;
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};
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static LIST_HEAD(brcmstb_gisb_arb_device_list);
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static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg)
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{
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int offset = gdev->gisb_offsets[reg];
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if (offset < 0) {
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/* return 1 if the hardware doesn't have ARB_ERR_CAP_MASTER */
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if (reg == ARB_ERR_CAP_MASTER)
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return 1;
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else
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return 0;
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}
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if (gdev->big_endian)
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return ioread32be(gdev->base + offset);
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else
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return ioread32(gdev->base + offset);
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}
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static u64 gisb_read_address(struct brcmstb_gisb_arb_device *gdev)
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{
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u64 value;
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value = gisb_read(gdev, ARB_ERR_CAP_ADDR);
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value |= (u64)gisb_read(gdev, ARB_ERR_CAP_HI_ADDR) << 32;
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return value;
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}
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static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg)
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{
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int offset = gdev->gisb_offsets[reg];
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if (offset == -1)
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return;
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if (gdev->big_endian)
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iowrite32be(val, gdev->base + offset);
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else
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iowrite32(val, gdev->base + offset);
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}
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static ssize_t gisb_arb_get_timeout(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev);
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u32 timeout;
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mutex_lock(&gdev->lock);
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timeout = gisb_read(gdev, ARB_TIMER);
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mutex_unlock(&gdev->lock);
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return sprintf(buf, "%d", timeout);
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}
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static ssize_t gisb_arb_set_timeout(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev);
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int val, ret;
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ret = kstrtoint(buf, 10, &val);
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if (ret < 0)
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return ret;
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if (val == 0 || val >= 0xffffffff)
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return -EINVAL;
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mutex_lock(&gdev->lock);
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gisb_write(gdev, val, ARB_TIMER);
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mutex_unlock(&gdev->lock);
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return count;
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}
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static const char *
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brcmstb_gisb_master_to_str(struct brcmstb_gisb_arb_device *gdev,
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u32 masters)
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{
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u32 mask = gdev->valid_mask & masters;
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if (hweight_long(mask) != 1)
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return NULL;
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return gdev->master_names[ffs(mask) - 1];
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}
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static int brcmstb_gisb_arb_decode_addr(struct brcmstb_gisb_arb_device *gdev,
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const char *reason)
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{
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u32 cap_status;
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u64 arb_addr;
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u32 master;
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const char *m_name;
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char m_fmt[11];
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cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS);
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/* Invalid captured address, bail out */
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if (!(cap_status & ARB_ERR_CAP_STATUS_VALID))
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return 1;
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/* Read the address and master */
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arb_addr = gisb_read_address(gdev);
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master = gisb_read(gdev, ARB_ERR_CAP_MASTER);
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m_name = brcmstb_gisb_master_to_str(gdev, master);
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if (!m_name) {
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snprintf(m_fmt, sizeof(m_fmt), "0x%08x", master);
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m_name = m_fmt;
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}
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pr_crit("%s: %s at 0x%llx [%c %s], core: %s\n",
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__func__, reason, arb_addr,
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cap_status & ARB_ERR_CAP_STATUS_WRITE ? 'W' : 'R',
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cap_status & ARB_ERR_CAP_STATUS_TIMEOUT ? "timeout" : "",
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m_name);
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/* clear the GISB error */
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gisb_write(gdev, ARB_ERR_CAP_CLEAR, ARB_ERR_CAP_CLR);
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return 0;
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}
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#ifdef CONFIG_MIPS
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static int brcmstb_bus_error_handler(struct pt_regs *regs, int is_fixup)
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{
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int ret = 0;
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struct brcmstb_gisb_arb_device *gdev;
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u32 cap_status;
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list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) {
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cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS);
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/* Invalid captured address, bail out */
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if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) {
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is_fixup = 1;
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goto out;
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}
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ret |= brcmstb_gisb_arb_decode_addr(gdev, "bus error");
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}
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out:
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return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
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}
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#endif
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static irqreturn_t brcmstb_gisb_timeout_handler(int irq, void *dev_id)
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{
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brcmstb_gisb_arb_decode_addr(dev_id, "timeout");
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return IRQ_HANDLED;
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}
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static irqreturn_t brcmstb_gisb_tea_handler(int irq, void *dev_id)
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{
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brcmstb_gisb_arb_decode_addr(dev_id, "target abort");
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return IRQ_HANDLED;
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}
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/*
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* Dump out gisb errors on die or panic.
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*/
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static int dump_gisb_error(struct notifier_block *self, unsigned long v,
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void *p);
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static struct notifier_block gisb_die_notifier = {
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.notifier_call = dump_gisb_error,
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};
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static struct notifier_block gisb_panic_notifier = {
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.notifier_call = dump_gisb_error,
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};
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static int dump_gisb_error(struct notifier_block *self, unsigned long v,
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void *p)
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{
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struct brcmstb_gisb_arb_device *gdev;
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const char *reason = "panic";
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if (self == &gisb_die_notifier)
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reason = "die";
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/* iterate over each GISB arb registered handlers */
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list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next)
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brcmstb_gisb_arb_decode_addr(gdev, reason);
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return NOTIFY_DONE;
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}
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static DEVICE_ATTR(gisb_arb_timeout, S_IWUSR | S_IRUGO,
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gisb_arb_get_timeout, gisb_arb_set_timeout);
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static struct attribute *gisb_arb_sysfs_attrs[] = {
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&dev_attr_gisb_arb_timeout.attr,
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NULL,
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};
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static struct attribute_group gisb_arb_sysfs_attr_group = {
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.attrs = gisb_arb_sysfs_attrs,
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};
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static const struct of_device_id brcmstb_gisb_arb_of_match[] = {
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{ .compatible = "brcm,gisb-arb", .data = gisb_offsets_bcm7445 },
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{ .compatible = "brcm,bcm7445-gisb-arb", .data = gisb_offsets_bcm7445 },
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{ .compatible = "brcm,bcm7435-gisb-arb", .data = gisb_offsets_bcm7435 },
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{ .compatible = "brcm,bcm7400-gisb-arb", .data = gisb_offsets_bcm7400 },
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{ .compatible = "brcm,bcm7278-gisb-arb", .data = gisb_offsets_bcm7278 },
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{ .compatible = "brcm,bcm7038-gisb-arb", .data = gisb_offsets_bcm7038 },
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{ },
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};
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static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev)
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{
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struct device_node *dn = pdev->dev.of_node;
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struct brcmstb_gisb_arb_device *gdev;
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const struct of_device_id *of_id;
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struct resource *r;
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int err, timeout_irq, tea_irq;
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unsigned int num_masters, j = 0;
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int i, first, last;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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timeout_irq = platform_get_irq(pdev, 0);
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tea_irq = platform_get_irq(pdev, 1);
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gdev = devm_kzalloc(&pdev->dev, sizeof(*gdev), GFP_KERNEL);
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if (!gdev)
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return -ENOMEM;
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mutex_init(&gdev->lock);
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INIT_LIST_HEAD(&gdev->next);
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gdev->base = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(gdev->base))
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return PTR_ERR(gdev->base);
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of_id = of_match_node(brcmstb_gisb_arb_of_match, dn);
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if (!of_id) {
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pr_err("failed to look up compatible string\n");
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return -EINVAL;
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}
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gdev->gisb_offsets = of_id->data;
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gdev->big_endian = of_device_is_big_endian(dn);
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err = devm_request_irq(&pdev->dev, timeout_irq,
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brcmstb_gisb_timeout_handler, 0, pdev->name,
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gdev);
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if (err < 0)
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return err;
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err = devm_request_irq(&pdev->dev, tea_irq,
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brcmstb_gisb_tea_handler, 0, pdev->name,
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gdev);
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if (err < 0)
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return err;
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/* If we do not have a valid mask, assume all masters are enabled */
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if (of_property_read_u32(dn, "brcm,gisb-arb-master-mask",
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&gdev->valid_mask))
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gdev->valid_mask = 0xffffffff;
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/* Proceed with reading the litteral names if we agree on the
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* number of masters
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*/
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num_masters = of_property_count_strings(dn,
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"brcm,gisb-arb-master-names");
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if (hweight_long(gdev->valid_mask) == num_masters) {
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first = ffs(gdev->valid_mask) - 1;
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last = fls(gdev->valid_mask) - 1;
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for (i = first; i < last; i++) {
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if (!(gdev->valid_mask & BIT(i)))
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continue;
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of_property_read_string_index(dn,
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"brcm,gisb-arb-master-names", j,
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&gdev->master_names[i]);
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j++;
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}
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}
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err = sysfs_create_group(&pdev->dev.kobj, &gisb_arb_sysfs_attr_group);
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if (err)
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return err;
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platform_set_drvdata(pdev, gdev);
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list_add_tail(&gdev->next, &brcmstb_gisb_arb_device_list);
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#ifdef CONFIG_MIPS
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board_be_handler = brcmstb_bus_error_handler;
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#endif
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if (list_is_singular(&brcmstb_gisb_arb_device_list)) {
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register_die_notifier(&gisb_die_notifier);
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atomic_notifier_chain_register(&panic_notifier_list,
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&gisb_panic_notifier);
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}
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dev_info(&pdev->dev, "registered mem: %p, irqs: %d, %d\n",
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gdev->base, timeout_irq, tea_irq);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int brcmstb_gisb_arb_suspend(struct device *dev)
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{
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struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev);
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gdev->saved_timeout = gisb_read(gdev, ARB_TIMER);
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return 0;
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}
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/* Make sure we provide the same timeout value that was configured before, and
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* do this before the GISB timeout interrupt handler has any chance to run.
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*/
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static int brcmstb_gisb_arb_resume_noirq(struct device *dev)
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{
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struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev);
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gisb_write(gdev, gdev->saved_timeout, ARB_TIMER);
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return 0;
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}
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#else
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#define brcmstb_gisb_arb_suspend NULL
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#define brcmstb_gisb_arb_resume_noirq NULL
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#endif
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static const struct dev_pm_ops brcmstb_gisb_arb_pm_ops = {
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.suspend = brcmstb_gisb_arb_suspend,
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.resume_noirq = brcmstb_gisb_arb_resume_noirq,
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};
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static struct platform_driver brcmstb_gisb_arb_driver = {
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.driver = {
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.name = "brcm-gisb-arb",
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.of_match_table = brcmstb_gisb_arb_of_match,
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.pm = &brcmstb_gisb_arb_pm_ops,
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},
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};
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static int __init brcm_gisb_driver_init(void)
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{
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return platform_driver_probe(&brcmstb_gisb_arb_driver,
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brcmstb_gisb_arb_probe);
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}
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module_init(brcm_gisb_driver_init);
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