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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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![Linus Torvalds](/assets/img/avatar_default.png)
* Support for cbo.zero in userspace. * Support for CBOs on ACPI-based systems. * A handful of improvements for the T-Head cache flushing ops. * Support for software shadow call stacks. * Various cleanups and fixes. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmVJAJoTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiWZrD/9ECV/0tuX5LbS56kA0ElkwiakyIVGu ZVuF26yGJ6w+XvwnHPhqKNVN0ReYR6s6CwH1WpHI5Du9QHZGQU3DKJ43dFMTP3Dn dQFli7QJ+tsNo1nre8NZWKj5Ac+Cu906F794qM0q0XrZmyb9DY3ojVYJAYy+dtoo /9gwbB7P0GLyDlURLn48oQyz36WQW3CkL5Jkfu+uYwnFe9DAFtfakIKq5mLlNuaH PgUk8pAVhSy2GdPOGFtnFFhdXMrTjpgxdo62ZIZC0lbsts26Dxp95oUygqMg51Iy ilaXkA2U1c1+gFQNpEove7BVZa5708Kaj6RLQ3/kAJblAzibszwQvIWlWOh7RVni 3GQAS7/0D0+0cjDwXdWaPIaFFzLfi3bDxRYkc7n59p6nOz+GrxnSNsRPQJGgYxeU oTtJfaqWKntm72iutiHmXgx/pvAxWOHpqDnSTlDdtjvgzXCplqBbxZFF/azj30o5 jplNW5YvdvD9fviYMAoGSOz03IwDeZF5rMlAhqu6vXlyD2//mID82yw/hBluIA3+ /hLo5QfTLiUGs9nnijxMcfoyusN6AXsJOxwYdAJCIuJOr78YUj0S974gd9KvJXma KedrwRVwW7KE7CwY1jhrWBsZEpzl8YrtpMDN47y4gRtDZN8XJMQ+lHqd+BHT/DUO TGUCYi5xvr6Vlw== =hKWl -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: - Support for cbo.zero in userspace - Support for CBOs on ACPI-based systems - A handful of improvements for the T-Head cache flushing ops - Support for software shadow call stacks - Various cleanups and fixes * tag 'riscv-for-linus-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (31 commits) RISC-V: hwprobe: Fix vDSO SIGSEGV riscv: configs: defconfig: Enable configs required for RZ/Five SoC riscv: errata: prefix T-Head mnemonics with th. riscv: put interrupt entries into .irqentry.text riscv: mm: Update the comment of CONFIG_PAGE_OFFSET riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause riscv/mm: Fix the comment for swap pte format RISC-V: clarify the QEMU workaround in ISA parser riscv: correct pt_level name via pgtable_l5/4_enabled RISC-V: Provide pgtable_l5_enabled on rv32 clocksource: timer-riscv: Increase rating of clock_event_device for Sstc clocksource: timer-riscv: Don't enable/disable timer interrupt lkdtm: Fix CFI_BACKWARD on RISC-V riscv: Use separate IRQ shadow call stacks riscv: Implement Shadow Call Stack riscv: Move global pointer loading to a macro riscv: Deduplicate IRQ stack switching riscv: VMAP_STACK overflow detection thread-safe RISC-V: cacheflush: Initialize CBO variables on ACPI systems RISC-V: ACPI: RHCT: Add function to get CBO block sizes ...
194 lines
5.8 KiB
Makefile
194 lines
5.8 KiB
Makefile
# This file is included by the global makefile so that you can add your own
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# architecture-specific flags and dependencies.
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#
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# This file is subject to the terms and conditions of the GNU General Public
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# License. See the file "COPYING" in the main directory of this archive
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# for more details.
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#
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LDFLAGS_vmlinux := -z norelro
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ifeq ($(CONFIG_RELOCATABLE),y)
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LDFLAGS_vmlinux += -shared -Bsymbolic -z notext --emit-relocs
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KBUILD_CFLAGS += -fPIE
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endif
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ifeq ($(CONFIG_DYNAMIC_FTRACE),y)
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LDFLAGS_vmlinux += --no-relax
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KBUILD_CPPFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY
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ifeq ($(CONFIG_RISCV_ISA_C),y)
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CC_FLAGS_FTRACE := -fpatchable-function-entry=4
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else
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CC_FLAGS_FTRACE := -fpatchable-function-entry=2
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endif
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endif
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ifeq ($(CONFIG_CMODEL_MEDLOW),y)
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KBUILD_CFLAGS_MODULE += -mcmodel=medany
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endif
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export BITS
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ifeq ($(CONFIG_ARCH_RV64I),y)
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BITS := 64
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UTS_MACHINE := riscv64
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KBUILD_CFLAGS += -mabi=lp64
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KBUILD_AFLAGS += -mabi=lp64
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KBUILD_LDFLAGS += -melf64lriscv
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else
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BITS := 32
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UTS_MACHINE := riscv32
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KBUILD_CFLAGS += -mabi=ilp32
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KBUILD_AFLAGS += -mabi=ilp32
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KBUILD_LDFLAGS += -melf32lriscv
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endif
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ifeq ($(CONFIG_LD_IS_LLD),y)
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ifeq ($(call test-lt, $(CONFIG_LLD_VERSION), 150000),y)
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KBUILD_CFLAGS += -mno-relax
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KBUILD_AFLAGS += -mno-relax
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ifndef CONFIG_AS_IS_LLVM
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KBUILD_CFLAGS += -Wa,-mno-relax
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KBUILD_AFLAGS += -Wa,-mno-relax
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endif
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endif
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endif
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ifeq ($(CONFIG_SHADOW_CALL_STACK),y)
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KBUILD_LDFLAGS += --no-relax-gp
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endif
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# ISA string setting
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riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
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riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
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riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
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riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
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riscv-march-$(CONFIG_RISCV_ISA_V) := $(riscv-march-y)v
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ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC
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KBUILD_CFLAGS += -Wa,-misa-spec=2.2
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KBUILD_AFLAGS += -Wa,-misa-spec=2.2
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else
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riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei
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endif
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# Check if the toolchain supports Zihintpause extension
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riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause
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# Remove F,D,V from isa string for all. Keep extensions between "fd" and "v" by
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# matching non-v and non-multi-letter extensions out with the filter ([^v_]*)
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KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/')
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KBUILD_AFLAGS += -march=$(riscv-march-y)
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KBUILD_CFLAGS += -mno-save-restore
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KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
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ifeq ($(CONFIG_CMODEL_MEDLOW),y)
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KBUILD_CFLAGS += -mcmodel=medlow
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endif
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ifeq ($(CONFIG_CMODEL_MEDANY),y)
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KBUILD_CFLAGS += -mcmodel=medany
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endif
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# Avoid generating .eh_frame sections.
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KBUILD_CFLAGS += -fno-asynchronous-unwind-tables -fno-unwind-tables
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# The RISC-V attributes frequently cause compatibility issues and provide no
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# information, so just turn them off.
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KBUILD_CFLAGS += $(call cc-option,-mno-riscv-attribute)
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KBUILD_AFLAGS += $(call cc-option,-mno-riscv-attribute)
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KBUILD_CFLAGS += $(call as-option,-Wa$(comma)-mno-arch-attr)
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KBUILD_AFLAGS += $(call as-option,-Wa$(comma)-mno-arch-attr)
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KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax)
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KBUILD_AFLAGS_MODULE += $(call as-option,-Wa$(comma)-mno-relax)
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# GCC versions that support the "-mstrict-align" option default to allowing
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# unaligned accesses. While unaligned accesses are explicitly allowed in the
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# RISC-V ISA, they're emulated by machine mode traps on all extant
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# architectures. It's faster to have GCC emit only aligned accesses.
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KBUILD_CFLAGS += $(call cc-option,-mstrict-align)
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ifeq ($(CONFIG_STACKPROTECTOR_PER_TASK),y)
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prepare: stack_protector_prepare
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stack_protector_prepare: prepare0
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$(eval KBUILD_CFLAGS += -mstack-protector-guard=tls \
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-mstack-protector-guard-reg=tp \
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-mstack-protector-guard-offset=$(shell \
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awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \
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include/generated/asm-offsets.h))
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endif
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# arch specific predefines for sparse
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CHECKFLAGS += -D__riscv -D__riscv_xlen=$(BITS)
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# Default target when executing plain make
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boot := arch/riscv/boot
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ifeq ($(CONFIG_XIP_KERNEL),y)
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KBUILD_IMAGE := $(boot)/xipImage
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else
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KBUILD_IMAGE := $(boot)/Image.gz
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endif
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libs-y += arch/riscv/lib/
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libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
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ifeq ($(KBUILD_EXTMOD),)
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ifeq ($(CONFIG_MMU),y)
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prepare: vdso_prepare
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vdso_prepare: prepare0
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$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso include/generated/vdso-offsets.h
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$(if $(CONFIG_COMPAT),$(Q)$(MAKE) \
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$(build)=arch/riscv/kernel/compat_vdso include/generated/compat_vdso-offsets.h)
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endif
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endif
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vdso-install-y += arch/riscv/kernel/vdso/vdso.so.dbg
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vdso-install-$(CONFIG_COMPAT) += arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg:../compat_vdso/compat_vdso.so
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ifneq ($(CONFIG_XIP_KERNEL),y)
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ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy)
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KBUILD_IMAGE := $(boot)/loader.bin
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else
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ifeq ($(CONFIG_EFI_ZBOOT),)
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KBUILD_IMAGE := $(boot)/Image.gz
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else
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KBUILD_IMAGE := $(boot)/vmlinuz.efi
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endif
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endif
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endif
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BOOT_TARGETS := Image Image.gz loader loader.bin xipImage vmlinuz.efi
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all: $(notdir $(KBUILD_IMAGE))
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$(BOOT_TARGETS): vmlinux
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$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
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@$(kecho) ' Kernel: $(boot)/$@ is ready'
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Image.%: Image
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$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
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install: KBUILD_IMAGE := $(boot)/Image
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zinstall: KBUILD_IMAGE := $(boot)/Image.gz
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install zinstall:
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$(call cmd,install)
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PHONY += rv32_randconfig
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rv32_randconfig:
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$(Q)$(MAKE) KCONFIG_ALLCONFIG=$(srctree)/arch/riscv/configs/32-bit.config \
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-f $(srctree)/Makefile randconfig
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PHONY += rv64_randconfig
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rv64_randconfig:
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$(Q)$(MAKE) KCONFIG_ALLCONFIG=$(srctree)/arch/riscv/configs/64-bit.config \
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-f $(srctree)/Makefile randconfig
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PHONY += rv32_defconfig
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rv32_defconfig:
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$(Q)$(MAKE) -f $(srctree)/Makefile defconfig 32-bit.config
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PHONY += rv32_nommu_virt_defconfig
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rv32_nommu_virt_defconfig:
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$(Q)$(MAKE) -f $(srctree)/Makefile nommu_virt_defconfig 32-bit.config
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