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In general, activating long mode involves setting the EFER_LME bit in the EFER register and then enabling the X86_CR0_PG bit in the CR0 register. At this point, the EFER_LMA bit will be set automatically by hardware. In the case of SVM/SEV guests where writes to CR0 are intercepted, it's necessary for the host to set EFER_LMA on behalf of the guest since hardware does not see the actual CR0 write. In the case of SEV-ES guests where writes to CR0 are trapped instead of intercepted, the hardware *does* see/record the write to CR0 before exiting and passing the value on to the host, so as part of enabling SEV-ES support commit |
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avic.c | ||
hyperv.c | ||
hyperv.h | ||
nested.c | ||
pmu.c | ||
sev.c | ||
svm.c | ||
svm.h | ||
svm_onhyperv.c | ||
svm_onhyperv.h | ||
svm_ops.h | ||
vmenter.S |