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![Adrian Bunk](/assets/img/avatar_default.png)
Once upon a time, the MTD repository was using CVS. This patch therefore removes all usages of the no longer updated CVS keywords from the MTD code. This also includes code that printed them to the user. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
176 lines
4.3 KiB
C
176 lines
4.3 KiB
C
/*
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* drivers/mtd/nand/spia.c
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*
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* Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
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*
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*
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* 10-29-2001 TG change to support hardwarespecific access
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* to controllines (due to change in nand.c)
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* page_cache added
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Overview:
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* This is a device driver for the NAND flash device found on the
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* SPIA board which utilizes the Toshiba TC58V64AFT part. This is
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* a 64Mibit (8MiB x 8 bits) NAND flash device.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <asm/io.h>
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/*
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* MTD structure for SPIA board
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*/
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static struct mtd_info *spia_mtd = NULL;
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/*
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* Values specific to the SPIA board (used with EP7212 processor)
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*/
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#define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */
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#define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */
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#define SPIA_PEDR 0x0080 /*
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* IO offset to Port E data register
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* where the CLE, ALE and NCE pins
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* are wired to.
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*/
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#define SPIA_PEDDR 0x00c0 /*
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* IO offset to Port E data direction
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* register so we can control the IO
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* lines.
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*/
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/*
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* Module stuff
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*/
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static int spia_io_base = SPIA_IO_BASE;
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static int spia_fio_base = SPIA_FIO_BASE;
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static int spia_pedr = SPIA_PEDR;
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static int spia_peddr = SPIA_PEDDR;
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module_param(spia_io_base, int, 0);
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module_param(spia_fio_base, int, 0);
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module_param(spia_pedr, int, 0);
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module_param(spia_peddr, int, 0);
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/*
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* Define partitions for flash device
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*/
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static const struct mtd_partition partition_info[] = {
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{
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.name = "SPIA flash partition 1",
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.offset = 0,
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.size = 2 * 1024 * 1024},
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{
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.name = "SPIA flash partition 2",
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.offset = 2 * 1024 * 1024,
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.size = 6 * 1024 * 1024}
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};
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#define NUM_PARTITIONS 2
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/*
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* hardware specific access to control-lines
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*
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* ctrl:
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* NAND_CNE: bit 0 -> bit 2
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* NAND_CLE: bit 1 -> bit 0
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* NAND_ALE: bit 2 -> bit 1
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*/
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static void spia_hwcontrol(struct mtd_info *mtd, int cmd)
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{
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struct nand_chip *chip = mtd->priv;
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if (ctrl & NAND_CTRL_CHANGE) {
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void __iomem *addr = spia_io_base + spia_pedr;
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unsigned char bits;
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bits = (ctrl & NAND_CNE) << 2;
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bits |= (ctrl & NAND_CLE | NAND_ALE) >> 1;
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writeb((readb(addr) & ~0x7) | bits, addr);
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}
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if (cmd != NAND_CMD_NONE)
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writeb(cmd, chip->IO_ADDR_W);
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}
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/*
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* Main initialization routine
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*/
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static int __init spia_init(void)
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{
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struct nand_chip *this;
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/* Allocate memory for MTD device structure and private data */
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spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
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if (!spia_mtd) {
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printk("Unable to allocate SPIA NAND MTD device structure.\n");
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return -ENOMEM;
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}
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/* Get pointer to private data */
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this = (struct nand_chip *)(&spia_mtd[1]);
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/* Initialize structures */
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memset(spia_mtd, 0, sizeof(struct mtd_info));
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memset(this, 0, sizeof(struct nand_chip));
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/* Link the private data with the MTD structure */
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spia_mtd->priv = this;
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spia_mtd->owner = THIS_MODULE;
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/*
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* Set GPIO Port E control register so that the pins are configured
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* to be outputs for controlling the NAND flash.
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*/
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(*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07;
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/* Set address of NAND IO lines */
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this->IO_ADDR_R = (void __iomem *)spia_fio_base;
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this->IO_ADDR_W = (void __iomem *)spia_fio_base;
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/* Set address of hardware control function */
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this->cmd_ctrl = spia_hwcontrol;
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/* 15 us command delay time */
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this->chip_delay = 15;
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/* Scan to find existence of the device */
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if (nand_scan(spia_mtd, 1)) {
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kfree(spia_mtd);
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return -ENXIO;
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}
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/* Register the partitions */
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add_mtd_partitions(spia_mtd, partition_info, NUM_PARTITIONS);
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/* Return happy */
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return 0;
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}
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module_init(spia_init);
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/*
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* Clean up routine
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*/
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static void __exit spia_cleanup(void)
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{
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/* Release resources, unregister device */
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nand_release(spia_mtd);
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/* Free the MTD device structure */
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kfree(spia_mtd);
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}
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module_exit(spia_cleanup);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com");
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MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on SPIA board");
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