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![Roger Quadros](/assets/img/avatar_default.png)
We shouldn't be calling clk_prepare_enable()/clk_prepare_disable() in an atomic context. Fixes the following issue: [ 5.830970] ehci-omap: OMAP-EHCI Host Controller driver [ 5.830974] driver_register 'ehci-omap' [ 5.895849] driver_register 'wl1271_sdio' [ 5.896870] BUG: scheduling while atomic: udevd/994/0x00000002 [ 5.896876] 4 locks held by udevd/994: [ 5.896904] #0: (&dev->mutex){......}, at: [<c049597c>] __driver_attach+0x60/0xac [ 5.896923] #1: (&dev->mutex){......}, at: [<c049598c>] __driver_attach+0x70/0xac [ 5.896946] #2: (tll_lock){+.+...}, at: [<c04c2630>] omap_tll_enable+0x2c/0xd0 [ 5.896966] #3: (prepare_lock){+.+...}, at: [<c05ce9c8>] clk_prepare_lock+0x48/0xe0 [ 5.897042] Modules linked in: wlcore_sdio(+) ehci_omap(+) dwc3_omap snd_soc_ts3a225e leds_is31fl319x bq27xxx_battery_i2c tsc2007 bq27xxx_battery bq2429x_charger ina2xx tca8418_keypad as5013 leds_tca6507 twl6040_vibra gpio_twl6040 bmp085_i2c(+) palmas_gpadc usb3503 palmas_pwrbutton bmg160_i2c(+) bmp085 bma150(+) bmg160_core bmp280 input_polldev snd_soc_omap_mcbsp snd_soc_omap_mcpdm snd_soc_omap snd_pcm_dmaengine [ 5.897048] Preemption disabled at:[< (null)>] (null) [ 5.897051] [ 5.897059] CPU: 0 PID: 994 Comm: udevd Not tainted 4.6.0-rc5-letux+ #233 [ 5.897062] Hardware name: Generic OMAP5 (Flattened Device Tree) [ 5.897076] [<c010e714>] (unwind_backtrace) from [<c010af34>] (show_stack+0x10/0x14) [ 5.897087] [<c010af34>] (show_stack) from [<c040aa7c>] (dump_stack+0x88/0xc0) [ 5.897099] [<c040aa7c>] (dump_stack) from [<c020c558>] (__schedule_bug+0xac/0xd0) [ 5.897111] [<c020c558>] (__schedule_bug) from [<c06f3d44>] (__schedule+0x88/0x7e4) [ 5.897120] [<c06f3d44>] (__schedule) from [<c06f46d8>] (schedule+0x9c/0xc0) [ 5.897129] [<c06f46d8>] (schedule) from [<c06f4904>] (schedule_preempt_disabled+0x14/0x20) [ 5.897140] [<c06f4904>] (schedule_preempt_disabled) from [<c06f64e4>] (mutex_lock_nested+0x258/0x43c) [ 5.897150] [<c06f64e4>] (mutex_lock_nested) from [<c05ce9c8>] (clk_prepare_lock+0x48/0xe0) [ 5.897160] [<c05ce9c8>] (clk_prepare_lock) from [<c05d0e7c>] (clk_prepare+0x10/0x28) [ 5.897169] [<c05d0e7c>] (clk_prepare) from [<c04c2668>] (omap_tll_enable+0x64/0xd0) [ 5.897180] [<c04c2668>] (omap_tll_enable) from [<c04c1728>] (usbhs_runtime_resume+0x18/0x17c) [ 5.897192] [<c04c1728>] (usbhs_runtime_resume) from [<c049d404>] (pm_generic_runtime_resume+0x2c/0x40) [ 5.897202] [<c049d404>] (pm_generic_runtime_resume) from [<c049f180>] (__rpm_callback+0x38/0x68) [ 5.897210] [<c049f180>] (__rpm_callback) from [<c049f220>] (rpm_callback+0x70/0x88) [ 5.897218] [<c049f220>] (rpm_callback) from [<c04a0a00>] (rpm_resume+0x4ec/0x7ec) [ 5.897227] [<c04a0a00>] (rpm_resume) from [<c04a0f48>] (__pm_runtime_resume+0x4c/0x64) [ 5.897236] [<c04a0f48>] (__pm_runtime_resume) from [<c04958dc>] (driver_probe_device+0x30/0x70) [ 5.897246] [<c04958dc>] (driver_probe_device) from [<c04959a4>] (__driver_attach+0x88/0xac) [ 5.897256] [<c04959a4>] (__driver_attach) from [<c04940f8>] (bus_for_each_dev+0x50/0x84) [ 5.897267] [<c04940f8>] (bus_for_each_dev) from [<c0494e40>] (bus_add_driver+0xcc/0x1e4) [ 5.897276] [<c0494e40>] (bus_add_driver) from [<c0496914>] (driver_register+0xac/0xf4) [ 5.897286] [<c0496914>] (driver_register) from [<c01018e0>] (do_one_initcall+0x100/0x1b8) [ 5.897296] [<c01018e0>] (do_one_initcall) from [<c01c7a54>] (do_init_module+0x58/0x1c0) [ 5.897304] [<c01c7a54>] (do_init_module) from [<c01c8a3c>] (SyS_finit_module+0x88/0x90) [ 5.897313] [<c01c8a3c>] (SyS_finit_module) from [<c0107120>] (ret_fast_syscall+0x0/0x1c) [ 5.912697] ------------[ cut here ]------------ [ 5.912711] WARNING: CPU: 0 PID: 994 at kernel/sched/core.c:2996 _raw_spin_unlock+0x28/0x58 [ 5.912717] DEBUG_LOCKS_WARN_ON(val > preempt_count()) Cc: <stable@vger.kernel.org> Reported-by: H. Nikolaus Schaller <hns@goldelico.com> Tested-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
489 lines
13 KiB
C
489 lines
13 KiB
C
/**
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* omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
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*
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* Copyright (C) 2012-2013 Texas Instruments Incorporated - http://www.ti.com
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* Author: Keshava Munegowda <keshava_mgowda@ti.com>
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* Author: Roger Quadros <rogerq@ti.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 of
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* the License as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/pm_runtime.h>
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#include <linux/platform_data/usb-omap.h>
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#include <linux/of.h>
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#define USBTLL_DRIVER_NAME "usbhs_tll"
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/* TLL Register Set */
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#define OMAP_USBTLL_REVISION (0x00)
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#define OMAP_USBTLL_SYSCONFIG (0x10)
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#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
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#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
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#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
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#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
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#define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
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#define OMAP_USBTLL_SYSSTATUS (0x14)
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#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
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#define OMAP_USBTLL_IRQSTATUS (0x18)
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#define OMAP_USBTLL_IRQENABLE (0x1C)
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#define OMAP_TLL_SHARED_CONF (0x30)
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#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
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#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
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#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
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#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
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#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
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#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
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#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
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#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16)
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#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15)
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#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
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#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
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#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
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#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
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#define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 << 1)
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#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
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#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
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#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
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#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
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#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
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#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
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#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
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#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
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#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
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#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
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#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
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#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
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#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
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#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
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#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
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#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
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#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
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#define OMAP_REV2_TLL_CHANNEL_COUNT 2
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#define OMAP_TLL_CHANNEL_COUNT 3
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#define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
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#define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
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#define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
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/* Values of USBTLL_REVISION - Note: these are not given in the TRM */
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#define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */
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#define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */
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#define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */
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#define OMAP_USBTLL_REV4 0x00000006 /* OMAP5 */
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#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
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/* only PHY and UNUSED modes don't need TLL */
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#define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
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(x) != OMAP_EHCI_PORT_MODE_PHY)
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struct usbtll_omap {
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int nch; /* num. of channels */
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struct clk **ch_clk;
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void __iomem *base;
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};
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/*-------------------------------------------------------------------------*/
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static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
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static struct device *tll_dev;
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static DEFINE_SPINLOCK(tll_lock); /* serialize access to tll_dev */
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/*-------------------------------------------------------------------------*/
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static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
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{
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writel_relaxed(val, base + reg);
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}
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static inline u32 usbtll_read(void __iomem *base, u32 reg)
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{
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return readl_relaxed(base + reg);
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}
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static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val)
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{
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writeb_relaxed(val, base + reg);
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}
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static inline u8 usbtll_readb(void __iomem *base, u8 reg)
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{
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return readb_relaxed(base + reg);
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}
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/*-------------------------------------------------------------------------*/
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static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
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{
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switch (pmode) {
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
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case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
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case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
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case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
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case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
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return true;
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default:
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return false;
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}
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}
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/*
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* convert the port-mode enum to a value we can use in the FSLSMODE
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* field of USBTLL_CHANNEL_CONF
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*/
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static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
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{
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switch (mode) {
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case OMAP_USBHS_PORT_MODE_UNUSED:
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
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case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_3PIN_PHY;
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case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
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return OMAP_TLL_FSLSMODE_4PIN_PHY;
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
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return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
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case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_3PIN_TLL;
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case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
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return OMAP_TLL_FSLSMODE_4PIN_TLL;
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
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return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
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default:
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pr_warn("Invalid port mode, using default\n");
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
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}
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}
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/**
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* usbtll_omap_probe - initialize TI-based HCDs
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*
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* Allocates basic resources for this USB host controller.
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*/
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static int usbtll_omap_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct resource *res;
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struct usbtll_omap *tll;
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int ret = 0;
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int i, ver;
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dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
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tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL);
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if (!tll) {
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dev_err(dev, "Memory allocation failed\n");
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return -ENOMEM;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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tll->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(tll->base))
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return PTR_ERR(tll->base);
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platform_set_drvdata(pdev, tll);
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pm_runtime_enable(dev);
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pm_runtime_get_sync(dev);
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ver = usbtll_read(tll->base, OMAP_USBTLL_REVISION);
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switch (ver) {
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case OMAP_USBTLL_REV1:
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case OMAP_USBTLL_REV4:
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tll->nch = OMAP_TLL_CHANNEL_COUNT;
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break;
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case OMAP_USBTLL_REV2:
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case OMAP_USBTLL_REV3:
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tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
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break;
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default:
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tll->nch = OMAP_TLL_CHANNEL_COUNT;
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dev_dbg(dev,
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"USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
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ver, tll->nch);
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break;
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}
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tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk *) * tll->nch,
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GFP_KERNEL);
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if (!tll->ch_clk) {
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ret = -ENOMEM;
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dev_err(dev, "Couldn't allocate memory for channel clocks\n");
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goto err_clk_alloc;
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}
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for (i = 0; i < tll->nch; i++) {
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char clkname[] = "usb_tll_hs_usb_chx_clk";
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snprintf(clkname, sizeof(clkname),
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"usb_tll_hs_usb_ch%d_clk", i);
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tll->ch_clk[i] = clk_get(dev, clkname);
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if (IS_ERR(tll->ch_clk[i]))
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dev_dbg(dev, "can't get clock : %s\n", clkname);
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else
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clk_prepare(tll->ch_clk[i]);
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}
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pm_runtime_put_sync(dev);
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/* only after this can omap_tll_enable/disable work */
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spin_lock(&tll_lock);
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tll_dev = dev;
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spin_unlock(&tll_lock);
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return 0;
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err_clk_alloc:
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pm_runtime_put_sync(dev);
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pm_runtime_disable(dev);
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return ret;
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}
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/**
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* usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
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* @pdev: USB Host Controller being removed
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*
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* Reverses the effect of usbtll_omap_probe().
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*/
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static int usbtll_omap_remove(struct platform_device *pdev)
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{
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struct usbtll_omap *tll = platform_get_drvdata(pdev);
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int i;
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spin_lock(&tll_lock);
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tll_dev = NULL;
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spin_unlock(&tll_lock);
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for (i = 0; i < tll->nch; i++) {
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if (!IS_ERR(tll->ch_clk[i])) {
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clk_unprepare(tll->ch_clk[i]);
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clk_put(tll->ch_clk[i]);
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}
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}
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pm_runtime_disable(&pdev->dev);
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return 0;
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}
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static const struct of_device_id usbtll_omap_dt_ids[] = {
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{ .compatible = "ti,usbhs-tll" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids);
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static struct platform_driver usbtll_omap_driver = {
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.driver = {
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.name = (char *)usbtll_driver_name,
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.of_match_table = usbtll_omap_dt_ids,
|
|
},
|
|
.probe = usbtll_omap_probe,
|
|
.remove = usbtll_omap_remove,
|
|
};
|
|
|
|
int omap_tll_init(struct usbhs_omap_platform_data *pdata)
|
|
{
|
|
int i;
|
|
bool needs_tll;
|
|
unsigned reg;
|
|
struct usbtll_omap *tll;
|
|
|
|
if (!tll_dev)
|
|
return -ENODEV;
|
|
|
|
pm_runtime_get_sync(tll_dev);
|
|
|
|
spin_lock(&tll_lock);
|
|
tll = dev_get_drvdata(tll_dev);
|
|
needs_tll = false;
|
|
for (i = 0; i < tll->nch; i++)
|
|
needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);
|
|
|
|
if (needs_tll) {
|
|
void __iomem *base = tll->base;
|
|
|
|
/* Program Common TLL register */
|
|
reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
|
|
reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
|
|
| OMAP_TLL_SHARED_CONF_USB_DIVRATION);
|
|
reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
|
|
reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
|
|
|
|
usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
|
|
|
|
/* Enable channels now */
|
|
for (i = 0; i < tll->nch; i++) {
|
|
reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
|
|
|
|
if (is_ohci_port(pdata->port_mode[i])) {
|
|
reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
|
|
<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
|
|
reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
|
|
} else if (pdata->port_mode[i] ==
|
|
OMAP_EHCI_PORT_MODE_TLL) {
|
|
/*
|
|
* Disable AutoIdle, BitStuffing
|
|
* and use SDR Mode
|
|
*/
|
|
reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
|
|
| OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
|
|
| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
|
|
} else if (pdata->port_mode[i] ==
|
|
OMAP_EHCI_PORT_MODE_HSIC) {
|
|
/*
|
|
* HSIC Mode requires UTMI port configurations
|
|
*/
|
|
reg |= OMAP_TLL_CHANNEL_CONF_DRVVBUS
|
|
| OMAP_TLL_CHANNEL_CONF_CHRGVBUS
|
|
| OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI
|
|
| OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
|
|
} else {
|
|
continue;
|
|
}
|
|
reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
|
|
usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
|
|
|
|
usbtll_writeb(base,
|
|
OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
|
|
0xbe);
|
|
}
|
|
}
|
|
|
|
spin_unlock(&tll_lock);
|
|
pm_runtime_put_sync(tll_dev);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(omap_tll_init);
|
|
|
|
int omap_tll_enable(struct usbhs_omap_platform_data *pdata)
|
|
{
|
|
int i;
|
|
struct usbtll_omap *tll;
|
|
|
|
if (!tll_dev)
|
|
return -ENODEV;
|
|
|
|
pm_runtime_get_sync(tll_dev);
|
|
|
|
spin_lock(&tll_lock);
|
|
tll = dev_get_drvdata(tll_dev);
|
|
|
|
for (i = 0; i < tll->nch; i++) {
|
|
if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
|
|
int r;
|
|
|
|
if (IS_ERR(tll->ch_clk[i]))
|
|
continue;
|
|
|
|
r = clk_enable(tll->ch_clk[i]);
|
|
if (r) {
|
|
dev_err(tll_dev,
|
|
"Error enabling ch %d clock: %d\n", i, r);
|
|
}
|
|
}
|
|
}
|
|
|
|
spin_unlock(&tll_lock);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(omap_tll_enable);
|
|
|
|
int omap_tll_disable(struct usbhs_omap_platform_data *pdata)
|
|
{
|
|
int i;
|
|
struct usbtll_omap *tll;
|
|
|
|
if (!tll_dev)
|
|
return -ENODEV;
|
|
|
|
spin_lock(&tll_lock);
|
|
tll = dev_get_drvdata(tll_dev);
|
|
|
|
for (i = 0; i < tll->nch; i++) {
|
|
if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
|
|
if (!IS_ERR(tll->ch_clk[i]))
|
|
clk_disable(tll->ch_clk[i]);
|
|
}
|
|
}
|
|
|
|
spin_unlock(&tll_lock);
|
|
pm_runtime_put_sync(tll_dev);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(omap_tll_disable);
|
|
|
|
MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
|
|
MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
|
|
MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
|
|
|
|
static int __init omap_usbtll_drvinit(void)
|
|
{
|
|
return platform_driver_register(&usbtll_omap_driver);
|
|
}
|
|
|
|
/*
|
|
* init before usbhs core driver;
|
|
* The usbtll driver should be initialized before
|
|
* the usbhs core driver probe function is called.
|
|
*/
|
|
fs_initcall(omap_usbtll_drvinit);
|
|
|
|
static void __exit omap_usbtll_drvexit(void)
|
|
{
|
|
platform_driver_unregister(&usbtll_omap_driver);
|
|
}
|
|
module_exit(omap_usbtll_drvexit);
|