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linux-stable/arch/riscv/boot
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Inochi Amaoto 1f4a994be2
riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format 
Change the timer layout in the dtb to fit the format that needed by
the SBI.

Fixes: 967a94a92a ("riscv: dts: add initial Sophgo SG2042 SoC device tree")
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-01-26 13:33:52 +01:00
..
dts riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format 2024-01-26 13:33:52 +01:00
.gitignore riscv: efi: enable generic EFI compressed boot 2022-09-20 09:50:30 +02:00
install.sh kbuild: factor out the common installation code into scripts/install.sh 2022-05-11 21:45:53 +09:00
loader.lds.S riscv: Move kernel mapping outside of linear mapping 2021-04-26 08:25:04 -07:00
loader.S
Makefile riscv: boot: Fix creation of loader.bin 2023-11-06 09:39:26 -08:00