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394457a928
KVM does not deliver x2APIC broadcast messages with physical mode. Intel SDM (10.12.9 ICR Operation in x2APIC Mode) states: "A destination ID value of FFFF_FFFFH is used for broadcast of interrupts in both logical destination and physical destination modes." In addition, the local-apic enables cluster mode broadcast. As Intel SDM 10.6.2.2 says: "Broadcast to all local APICs is achieved by setting all destination bits to one." This patch enables cluster mode broadcast. The fix tries to combine broadcast in different modes through a unified code. One rare case occurs when the source of IPI has its APIC disabled. In such case, the source can still issue IPIs, but since the source is not obliged to have the same LAPIC mode as the enabled ones, we cannot rely on it. Since it is a rare case, it is unoptimized and done on the slow-path. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Reviewed-by: Radim Krčmář <rkrcmar@redhat.com> Reviewed-by: Wanpeng Li <wanpeng.li@linux.intel.com> [As per Radim's review, use unsigned int for X2APIC_BROADCAST, return bool from kvm_apic_broadcast. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
104 lines
2.8 KiB
C
104 lines
2.8 KiB
C
#ifndef __KVM_IO_APIC_H
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#define __KVM_IO_APIC_H
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#include <linux/kvm_host.h>
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#include "iodev.h"
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struct kvm;
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struct kvm_vcpu;
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#define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS
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#define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */
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#define IOAPIC_EDGE_TRIG 0
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#define IOAPIC_LEVEL_TRIG 1
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#define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
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#define IOAPIC_MEM_LENGTH 0x100
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/* Direct registers. */
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#define IOAPIC_REG_SELECT 0x00
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#define IOAPIC_REG_WINDOW 0x10
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#define IOAPIC_REG_EOI 0x40 /* IA64 IOSAPIC only */
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/* Indirect registers. */
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#define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
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#define IOAPIC_REG_VERSION 0x01
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#define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */
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/*ioapic delivery mode*/
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#define IOAPIC_FIXED 0x0
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#define IOAPIC_LOWEST_PRIORITY 0x1
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#define IOAPIC_PMI 0x2
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#define IOAPIC_NMI 0x4
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#define IOAPIC_INIT 0x5
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#define IOAPIC_EXTINT 0x7
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#ifdef CONFIG_X86
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#define RTC_GSI 8
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#else
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#define RTC_GSI -1U
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#endif
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struct rtc_status {
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int pending_eoi;
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DECLARE_BITMAP(dest_map, KVM_MAX_VCPUS);
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};
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struct kvm_ioapic {
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u64 base_address;
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u32 ioregsel;
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u32 id;
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u32 irr;
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u32 pad;
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union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS];
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unsigned long irq_states[IOAPIC_NUM_PINS];
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struct kvm_io_device dev;
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struct kvm *kvm;
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void (*ack_notifier)(void *opaque, int irq);
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spinlock_t lock;
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DECLARE_BITMAP(handled_vectors, 256);
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struct rtc_status rtc_status;
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struct delayed_work eoi_inject;
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u32 irq_eoi[IOAPIC_NUM_PINS];
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};
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#ifdef DEBUG
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#define ASSERT(x) \
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do { \
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if (!(x)) { \
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printk(KERN_EMERG "assertion failed %s: %d: %s\n", \
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__FILE__, __LINE__, #x); \
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BUG(); \
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} \
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} while (0)
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#else
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#define ASSERT(x) do { } while (0)
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#endif
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static inline struct kvm_ioapic *ioapic_irqchip(struct kvm *kvm)
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{
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return kvm->arch.vioapic;
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}
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void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu);
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int kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
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int short_hand, unsigned int dest, int dest_mode);
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int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2);
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void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector,
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int trigger_mode);
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bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector);
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int kvm_ioapic_init(struct kvm *kvm);
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void kvm_ioapic_destroy(struct kvm *kvm);
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int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
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int level, bool line_status);
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void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id);
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int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
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struct kvm_lapic_irq *irq, unsigned long *dest_map);
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int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
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int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
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void kvm_vcpu_request_scan_ioapic(struct kvm *kvm);
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void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
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u32 *tmr);
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#endif
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