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![Jesse Taube](/assets/img/avatar_default.png)
Add the pinctrl driver support for i.MXRT1170. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Link: https://lore.kernel.org/r/20220517032802.451743-11-Mr.Bossman075@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
349 lines
11 KiB
C
349 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022
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* Author(s): Jesse Taube <Mr.Bossman075@gmail.com>
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/platform_device.h>
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#include "pinctrl-imx.h"
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enum imxrt1170_pads {
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IMXRT1170_PAD_RESERVE0,
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IMXRT1170_PAD_RESERVE1,
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IMXRT1170_PAD_RESERVE2,
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IMXRT1170_PAD_RESERVE3,
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IMXRT1170_PAD_EMC_B1_00,
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IMXRT1170_PAD_EMC_B1_01,
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IMXRT1170_PAD_EMC_B1_02,
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IMXRT1170_PAD_EMC_B1_03,
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IMXRT1170_PAD_EMC_B1_04,
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IMXRT1170_PAD_EMC_B1_05,
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IMXRT1170_PAD_EMC_B1_06,
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IMXRT1170_PAD_EMC_B1_07,
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IMXRT1170_PAD_EMC_B1_08,
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IMXRT1170_PAD_EMC_B1_09,
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IMXRT1170_PAD_EMC_B1_10,
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IMXRT1170_PAD_EMC_B1_11,
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IMXRT1170_PAD_EMC_B1_12,
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IMXRT1170_PAD_EMC_B1_13,
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IMXRT1170_PAD_EMC_B1_14,
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IMXRT1170_PAD_EMC_B1_15,
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IMXRT1170_PAD_EMC_B1_16,
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IMXRT1170_PAD_EMC_B1_17,
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IMXRT1170_PAD_EMC_B1_18,
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IMXRT1170_PAD_EMC_B1_19,
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IMXRT1170_PAD_EMC_B1_20,
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IMXRT1170_PAD_EMC_B1_21,
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IMXRT1170_PAD_EMC_B1_22,
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IMXRT1170_PAD_EMC_B1_23,
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IMXRT1170_PAD_EMC_B1_24,
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IMXRT1170_PAD_EMC_B1_25,
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IMXRT1170_PAD_EMC_B1_26,
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IMXRT1170_PAD_EMC_B1_27,
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IMXRT1170_PAD_EMC_B1_28,
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IMXRT1170_PAD_EMC_B1_29,
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IMXRT1170_PAD_EMC_B1_30,
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IMXRT1170_PAD_EMC_B1_31,
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IMXRT1170_PAD_EMC_B1_32,
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IMXRT1170_PAD_EMC_B1_33,
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IMXRT1170_PAD_EMC_B1_34,
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IMXRT1170_PAD_EMC_B1_35,
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IMXRT1170_PAD_EMC_B1_36,
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IMXRT1170_PAD_EMC_B1_37,
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IMXRT1170_PAD_EMC_B1_38,
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IMXRT1170_PAD_EMC_B1_39,
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IMXRT1170_PAD_EMC_B1_40,
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IMXRT1170_PAD_EMC_B1_41,
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IMXRT1170_PAD_EMC_B2_00,
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IMXRT1170_PAD_EMC_B2_01,
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IMXRT1170_PAD_EMC_B2_02,
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IMXRT1170_PAD_EMC_B2_03,
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IMXRT1170_PAD_EMC_B2_04,
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IMXRT1170_PAD_EMC_B2_05,
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IMXRT1170_PAD_EMC_B2_06,
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IMXRT1170_PAD_EMC_B2_07,
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IMXRT1170_PAD_EMC_B2_08,
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IMXRT1170_PAD_EMC_B2_09,
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IMXRT1170_PAD_EMC_B2_10,
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IMXRT1170_PAD_EMC_B2_11,
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IMXRT1170_PAD_EMC_B2_12,
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IMXRT1170_PAD_EMC_B2_13,
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IMXRT1170_PAD_EMC_B2_14,
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IMXRT1170_PAD_EMC_B2_15,
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IMXRT1170_PAD_EMC_B2_16,
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IMXRT1170_PAD_EMC_B2_17,
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IMXRT1170_PAD_EMC_B2_18,
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IMXRT1170_PAD_EMC_B2_19,
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IMXRT1170_PAD_EMC_B2_20,
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IMXRT1170_PAD_AD_00,
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IMXRT1170_PAD_AD_01,
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IMXRT1170_PAD_AD_02,
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IMXRT1170_PAD_AD_03,
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IMXRT1170_PAD_AD_04,
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IMXRT1170_PAD_AD_05,
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IMXRT1170_PAD_AD_06,
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IMXRT1170_PAD_AD_07,
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IMXRT1170_PAD_AD_08,
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IMXRT1170_PAD_AD_09,
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IMXRT1170_PAD_AD_10,
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IMXRT1170_PAD_AD_11,
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IMXRT1170_PAD_AD_12,
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IMXRT1170_PAD_AD_13,
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IMXRT1170_PAD_AD_14,
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IMXRT1170_PAD_AD_15,
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IMXRT1170_PAD_AD_16,
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IMXRT1170_PAD_AD_17,
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IMXRT1170_PAD_AD_18,
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IMXRT1170_PAD_AD_19,
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IMXRT1170_PAD_AD_20,
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IMXRT1170_PAD_AD_21,
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IMXRT1170_PAD_AD_22,
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IMXRT1170_PAD_AD_23,
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IMXRT1170_PAD_AD_24,
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IMXRT1170_PAD_AD_25,
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IMXRT1170_PAD_AD_26,
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IMXRT1170_PAD_AD_27,
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IMXRT1170_PAD_AD_28,
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IMXRT1170_PAD_AD_29,
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IMXRT1170_PAD_AD_30,
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IMXRT1170_PAD_AD_31,
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IMXRT1170_PAD_AD_32,
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IMXRT1170_PAD_AD_33,
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IMXRT1170_PAD_AD_34,
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IMXRT1170_PAD_AD_35,
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IMXRT1170_PAD_SD_B1_00,
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IMXRT1170_PAD_SD_B1_01,
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IMXRT1170_PAD_SD_B1_02,
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IMXRT1170_PAD_SD_B1_03,
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IMXRT1170_PAD_SD_B1_04,
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IMXRT1170_PAD_SD_B1_05,
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IMXRT1170_PAD_SD_B2_00,
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IMXRT1170_PAD_SD_B2_01,
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IMXRT1170_PAD_SD_B2_02,
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IMXRT1170_PAD_SD_B2_03,
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IMXRT1170_PAD_SD_B2_04,
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IMXRT1170_PAD_SD_B2_05,
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IMXRT1170_PAD_SD_B2_06,
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IMXRT1170_PAD_SD_B2_07,
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IMXRT1170_PAD_SD_B2_08,
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IMXRT1170_PAD_SD_B2_09,
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IMXRT1170_PAD_SD_B2_10,
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IMXRT1170_PAD_SD_B2_11,
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IMXRT1170_PAD_DISP_B1_00,
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IMXRT1170_PAD_DISP_B1_01,
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IMXRT1170_PAD_DISP_B1_02,
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IMXRT1170_PAD_DISP_B1_03,
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IMXRT1170_PAD_DISP_B1_04,
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IMXRT1170_PAD_DISP_B1_05,
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IMXRT1170_PAD_DISP_B1_06,
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IMXRT1170_PAD_DISP_B1_07,
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IMXRT1170_PAD_DISP_B1_08,
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IMXRT1170_PAD_DISP_B1_09,
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IMXRT1170_PAD_DISP_B1_10,
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IMXRT1170_PAD_DISP_B1_11,
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IMXRT1170_PAD_DISP_B2_00,
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IMXRT1170_PAD_DISP_B2_01,
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IMXRT1170_PAD_DISP_B2_02,
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IMXRT1170_PAD_DISP_B2_03,
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IMXRT1170_PAD_DISP_B2_04,
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IMXRT1170_PAD_DISP_B2_05,
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IMXRT1170_PAD_DISP_B2_06,
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IMXRT1170_PAD_DISP_B2_07,
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IMXRT1170_PAD_DISP_B2_08,
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IMXRT1170_PAD_DISP_B2_09,
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IMXRT1170_PAD_DISP_B2_10,
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IMXRT1170_PAD_DISP_B2_11,
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IMXRT1170_PAD_DISP_B2_12,
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IMXRT1170_PAD_DISP_B2_13,
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IMXRT1170_PAD_DISP_B2_14,
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IMXRT1170_PAD_DISP_B2_15,
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};
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/* Pad names for the pinmux subsystem */
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static const struct pinctrl_pin_desc imxrt1170_pinctrl_pads[] = {
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IMX_PINCTRL_PIN(IMXRT1170_PAD_RESERVE0),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_RESERVE1),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_RESERVE2),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_RESERVE3),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_00),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_01),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_02),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_03),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_04),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_05),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_06),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_07),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_08),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_09),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_10),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_11),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_12),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_13),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_14),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_15),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_16),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_17),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_18),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_19),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_20),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_21),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_22),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_23),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_24),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_25),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_26),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_27),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_28),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_29),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_30),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_31),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_32),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_33),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_34),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_35),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_36),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_37),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_38),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_39),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_40),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_41),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_00),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_01),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_02),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_03),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_04),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_05),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_06),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_07),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_08),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_09),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_10),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_11),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_12),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_13),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_14),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_15),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_16),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_17),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_18),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_19),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_20),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_00),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_01),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_02),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_03),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_04),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_05),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_06),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_07),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_08),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_09),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_10),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_11),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_12),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_13),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_14),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_15),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_16),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_17),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_18),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_19),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_20),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_21),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_22),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_23),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_24),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_25),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_26),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_27),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_28),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_29),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_30),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_31),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_32),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_33),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_34),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_35),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_00),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_01),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_02),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_03),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_04),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_05),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_00),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_01),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_02),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_03),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_04),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_05),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_06),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_07),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_08),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_09),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_10),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_11),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_00),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_01),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_02),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_03),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_04),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_05),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_06),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_07),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_08),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_09),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_10),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_11),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_00),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_01),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_02),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_03),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_04),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_05),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_06),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_07),
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IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_08),
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|
IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_09),
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|
IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_10),
|
|
IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_11),
|
|
IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_12),
|
|
IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_13),
|
|
IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_14),
|
|
IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_15),
|
|
};
|
|
|
|
static const struct imx_pinctrl_soc_info imxrt1170_pinctrl_info = {
|
|
.pins = imxrt1170_pinctrl_pads,
|
|
.npins = ARRAY_SIZE(imxrt1170_pinctrl_pads),
|
|
.gpr_compatible = "fsl,imxrt1170-iomuxc-gpr",
|
|
};
|
|
|
|
static const struct of_device_id imxrt1170_pinctrl_of_match[] = {
|
|
{ .compatible = "fsl,imxrt1170-iomuxc", .data = &imxrt1170_pinctrl_info, },
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
static int imxrt1170_pinctrl_probe(struct platform_device *pdev)
|
|
{
|
|
return imx_pinctrl_probe(pdev, &imxrt1170_pinctrl_info);
|
|
}
|
|
|
|
static struct platform_driver imxrt1170_pinctrl_driver = {
|
|
.driver = {
|
|
.name = "imxrt1170-pinctrl",
|
|
.of_match_table = of_match_ptr(imxrt1170_pinctrl_of_match),
|
|
.suppress_bind_attrs = true,
|
|
},
|
|
.probe = imxrt1170_pinctrl_probe,
|
|
};
|
|
|
|
static int __init imxrt1170_pinctrl_init(void)
|
|
{
|
|
return platform_driver_register(&imxrt1170_pinctrl_driver);
|
|
}
|
|
arch_initcall(imxrt1170_pinctrl_init);
|