mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 17:30:02 +00:00
52cd0d972f
- Loongson port PPC: - Fixes ARM: - Fixes x86: - KVM_SET_USER_MEMORY_REGION optimizations - Fixes - Selftest fixes The guest side of the asynchronous page fault work has been delayed to 5.9 in order to sync with Thomas's interrupt entry rework. -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl7icj4UHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroPHGQgAj9+5j+f5v06iMP/+ponWwsVfh+5/ UR1gPbpMSFMKF0U+BCFxsBeGKWPDiz9QXaLfy6UGfOFYBI475Su5SoZ8/i/o6a2V QjcKIJxBRNs66IG/774pIpONY8/mm/3b6vxmQktyBTqjb6XMGlOwoGZixj/RTp85 +uwSICxMlrijg+fhFMwC4Bo/8SFg+FeBVbwR07my88JaLj+3cV/NPolG900qLSa6 uPqJ289EQ86LrHIHXCEWRKYvwy77GFsmBYjKZH8yXpdzUlSGNexV8eIMAz50figu wYRJGmHrRqwuzFwEGknv8SA3s2HVggXO4WVkWWCeJyO8nIVfYFUhME5l6Q== =+Hh0 -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull more KVM updates from Paolo Bonzini: "The guest side of the asynchronous page fault work has been delayed to 5.9 in order to sync with Thomas's interrupt entry rework, but here's the rest of the KVM updates for this merge window. MIPS: - Loongson port PPC: - Fixes ARM: - Fixes x86: - KVM_SET_USER_MEMORY_REGION optimizations - Fixes - Selftest fixes" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (62 commits) KVM: x86: do not pass poisoned hva to __kvm_set_memory_region KVM: selftests: fix sync_with_host() in smm_test KVM: async_pf: Inject 'page ready' event only if 'page not present' was previously injected KVM: async_pf: Cleanup kvm_setup_async_pf() kvm: i8254: remove redundant assignment to pointer s KVM: x86: respect singlestep when emulating instruction KVM: selftests: Don't probe KVM_CAP_HYPERV_ENLIGHTENED_VMCS when nested VMX is unsupported KVM: selftests: do not substitute SVM/VMX check with KVM_CAP_NESTED_STATE check KVM: nVMX: Consult only the "basic" exit reason when routing nested exit KVM: arm64: Move hyp_symbol_addr() to kvm_asm.h KVM: arm64: Synchronize sysreg state on injecting an AArch32 exception KVM: arm64: Make vcpu_cp1x() work on Big Endian hosts KVM: arm64: Remove host_cpu_context member from vcpu structure KVM: arm64: Stop sparse from moaning at __hyp_this_cpu_ptr KVM: arm64: Handle PtrAuth traps early KVM: x86: Unexport x86_fpu_cache and make it static KVM: selftests: Ignore KVM 5-level paging support for VM_MODE_PXXV48_4K KVM: arm64: Save the host's PtrAuth keys in non-preemptible context KVM: arm64: Stop save/restoring ACTLR_EL1 KVM: arm64: Add emulation for 32bit guests accessing ACTLR2 ...
370 lines
9 KiB
C
370 lines
9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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*
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* Copyright IBM Corp. 2007
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* Copyright 2011 Freescale Semiconductor, Inc.
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#include <linux/jiffies.h>
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#include <linux/hrtimer.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm_host.h>
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#include <linux/clockchips.h>
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#include <asm/reg.h>
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#include <asm/time.h>
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#include <asm/byteorder.h>
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#include <asm/kvm_ppc.h>
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#include <asm/disassemble.h>
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#include <asm/ppc-opcode.h>
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#include <asm/sstep.h>
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#include "timing.h"
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#include "trace.h"
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#ifdef CONFIG_PPC_FPU
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static bool kvmppc_check_fp_disabled(struct kvm_vcpu *vcpu)
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{
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if (!(kvmppc_get_msr(vcpu) & MSR_FP)) {
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kvmppc_core_queue_fpunavail(vcpu);
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return true;
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}
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return false;
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}
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#endif /* CONFIG_PPC_FPU */
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#ifdef CONFIG_VSX
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static bool kvmppc_check_vsx_disabled(struct kvm_vcpu *vcpu)
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{
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if (!(kvmppc_get_msr(vcpu) & MSR_VSX)) {
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kvmppc_core_queue_vsx_unavail(vcpu);
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return true;
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}
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return false;
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}
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_ALTIVEC
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static bool kvmppc_check_altivec_disabled(struct kvm_vcpu *vcpu)
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{
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if (!(kvmppc_get_msr(vcpu) & MSR_VEC)) {
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kvmppc_core_queue_vec_unavail(vcpu);
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return true;
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}
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return false;
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}
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#endif /* CONFIG_ALTIVEC */
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/*
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* XXX to do:
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* lfiwax, lfiwzx
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* vector loads and stores
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*
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* Instructions that trap when used on cache-inhibited mappings
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* are not emulated here: multiple and string instructions,
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* lq/stq, and the load-reserve/store-conditional instructions.
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*/
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int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu)
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{
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u32 inst;
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enum emulation_result emulated = EMULATE_FAIL;
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int advance = 1;
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struct instruction_op op;
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/* this default type might be overwritten by subcategories */
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kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
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emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst);
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if (emulated != EMULATE_DONE)
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return emulated;
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vcpu->arch.mmio_vsx_copy_nums = 0;
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vcpu->arch.mmio_vsx_offset = 0;
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vcpu->arch.mmio_copy_type = KVMPPC_VSX_COPY_NONE;
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vcpu->arch.mmio_sp64_extend = 0;
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vcpu->arch.mmio_sign_extend = 0;
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vcpu->arch.mmio_vmx_copy_nums = 0;
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vcpu->arch.mmio_vmx_offset = 0;
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vcpu->arch.mmio_host_swabbed = 0;
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emulated = EMULATE_FAIL;
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vcpu->arch.regs.msr = vcpu->arch.shared->msr;
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if (analyse_instr(&op, &vcpu->arch.regs, ppc_inst(inst)) == 0) {
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int type = op.type & INSTR_TYPE_MASK;
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int size = GETSIZE(op.type);
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switch (type) {
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case LOAD: {
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int instr_byte_swap = op.type & BYTEREV;
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if (op.type & SIGNEXT)
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emulated = kvmppc_handle_loads(vcpu,
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op.reg, size, !instr_byte_swap);
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else
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emulated = kvmppc_handle_load(vcpu,
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op.reg, size, !instr_byte_swap);
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if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
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kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
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break;
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}
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#ifdef CONFIG_PPC_FPU
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case LOAD_FP:
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if (kvmppc_check_fp_disabled(vcpu))
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return EMULATE_DONE;
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if (op.type & FPCONV)
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vcpu->arch.mmio_sp64_extend = 1;
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if (op.type & SIGNEXT)
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emulated = kvmppc_handle_loads(vcpu,
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KVM_MMIO_REG_FPR|op.reg, size, 1);
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else
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emulated = kvmppc_handle_load(vcpu,
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KVM_MMIO_REG_FPR|op.reg, size, 1);
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if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
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kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
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break;
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#endif
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#ifdef CONFIG_ALTIVEC
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case LOAD_VMX:
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if (kvmppc_check_altivec_disabled(vcpu))
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return EMULATE_DONE;
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/* Hardware enforces alignment of VMX accesses */
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vcpu->arch.vaddr_accessed &= ~((unsigned long)size - 1);
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vcpu->arch.paddr_accessed &= ~((unsigned long)size - 1);
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if (size == 16) { /* lvx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_DWORD;
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} else if (size == 4) { /* lvewx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_WORD;
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} else if (size == 2) { /* lvehx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_HWORD;
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} else if (size == 1) { /* lvebx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_BYTE;
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} else
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break;
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vcpu->arch.mmio_vmx_offset =
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(vcpu->arch.vaddr_accessed & 0xf)/size;
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if (size == 16) {
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vcpu->arch.mmio_vmx_copy_nums = 2;
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emulated = kvmppc_handle_vmx_load(vcpu,
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KVM_MMIO_REG_VMX|op.reg,
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8, 1);
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} else {
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vcpu->arch.mmio_vmx_copy_nums = 1;
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emulated = kvmppc_handle_vmx_load(vcpu,
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KVM_MMIO_REG_VMX|op.reg,
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size, 1);
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}
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break;
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#endif
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#ifdef CONFIG_VSX
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case LOAD_VSX: {
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int io_size_each;
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if (op.vsx_flags & VSX_CHECK_VEC) {
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if (kvmppc_check_altivec_disabled(vcpu))
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return EMULATE_DONE;
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} else {
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if (kvmppc_check_vsx_disabled(vcpu))
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return EMULATE_DONE;
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}
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if (op.vsx_flags & VSX_FPCONV)
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vcpu->arch.mmio_sp64_extend = 1;
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if (op.element_size == 8) {
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if (op.vsx_flags & VSX_SPLAT)
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_DWORD_LOAD_DUMP;
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else
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_DWORD;
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} else if (op.element_size == 4) {
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if (op.vsx_flags & VSX_SPLAT)
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_WORD_LOAD_DUMP;
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else
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_WORD;
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} else
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break;
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if (size < op.element_size) {
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/* precision convert case: lxsspx, etc */
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vcpu->arch.mmio_vsx_copy_nums = 1;
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io_size_each = size;
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} else { /* lxvw4x, lxvd2x, etc */
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vcpu->arch.mmio_vsx_copy_nums =
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size/op.element_size;
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io_size_each = op.element_size;
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}
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emulated = kvmppc_handle_vsx_load(vcpu,
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KVM_MMIO_REG_VSX|op.reg, io_size_each,
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1, op.type & SIGNEXT);
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break;
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}
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#endif
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case STORE:
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/* if need byte reverse, op.val has been reversed by
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* analyse_instr().
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*/
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emulated = kvmppc_handle_store(vcpu, op.val, size, 1);
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if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
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kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
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break;
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#ifdef CONFIG_PPC_FPU
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case STORE_FP:
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if (kvmppc_check_fp_disabled(vcpu))
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return EMULATE_DONE;
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/* The FP registers need to be flushed so that
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* kvmppc_handle_store() can read actual FP vals
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* from vcpu->arch.
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*/
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if (vcpu->kvm->arch.kvm_ops->giveup_ext)
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vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu,
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MSR_FP);
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if (op.type & FPCONV)
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vcpu->arch.mmio_sp64_extend = 1;
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emulated = kvmppc_handle_store(vcpu,
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VCPU_FPR(vcpu, op.reg), size, 1);
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if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
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kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
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break;
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#endif
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#ifdef CONFIG_ALTIVEC
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case STORE_VMX:
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if (kvmppc_check_altivec_disabled(vcpu))
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return EMULATE_DONE;
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/* Hardware enforces alignment of VMX accesses. */
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vcpu->arch.vaddr_accessed &= ~((unsigned long)size - 1);
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vcpu->arch.paddr_accessed &= ~((unsigned long)size - 1);
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if (vcpu->kvm->arch.kvm_ops->giveup_ext)
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vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu,
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MSR_VEC);
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if (size == 16) { /* stvx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_DWORD;
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} else if (size == 4) { /* stvewx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_WORD;
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} else if (size == 2) { /* stvehx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_HWORD;
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} else if (size == 1) { /* stvebx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_BYTE;
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} else
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break;
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vcpu->arch.mmio_vmx_offset =
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(vcpu->arch.vaddr_accessed & 0xf)/size;
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if (size == 16) {
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vcpu->arch.mmio_vmx_copy_nums = 2;
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emulated = kvmppc_handle_vmx_store(vcpu,
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op.reg, 8, 1);
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} else {
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vcpu->arch.mmio_vmx_copy_nums = 1;
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emulated = kvmppc_handle_vmx_store(vcpu,
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op.reg, size, 1);
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}
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break;
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#endif
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#ifdef CONFIG_VSX
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case STORE_VSX: {
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int io_size_each;
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if (op.vsx_flags & VSX_CHECK_VEC) {
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if (kvmppc_check_altivec_disabled(vcpu))
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return EMULATE_DONE;
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} else {
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if (kvmppc_check_vsx_disabled(vcpu))
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return EMULATE_DONE;
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}
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if (vcpu->kvm->arch.kvm_ops->giveup_ext)
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vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu,
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MSR_VSX);
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if (op.vsx_flags & VSX_FPCONV)
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vcpu->arch.mmio_sp64_extend = 1;
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if (op.element_size == 8)
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_DWORD;
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else if (op.element_size == 4)
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_WORD;
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else
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break;
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if (size < op.element_size) {
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/* precise conversion case, like stxsspx */
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vcpu->arch.mmio_vsx_copy_nums = 1;
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io_size_each = size;
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} else { /* stxvw4x, stxvd2x, etc */
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vcpu->arch.mmio_vsx_copy_nums =
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size/op.element_size;
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io_size_each = op.element_size;
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}
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emulated = kvmppc_handle_vsx_store(vcpu,
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op.reg, io_size_each, 1);
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break;
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}
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#endif
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case CACHEOP:
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/* Do nothing. The guest is performing dcbi because
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* hardware DMA is not snooped by the dcache, but
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* emulated DMA either goes through the dcache as
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* normal writes, or the host kernel has handled dcache
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* coherence.
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*/
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emulated = EMULATE_DONE;
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break;
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default:
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break;
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}
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}
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if (emulated == EMULATE_FAIL) {
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advance = 0;
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kvmppc_core_queue_program(vcpu, 0);
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}
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trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);
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/* Advance past emulated instruction. */
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if (advance)
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kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
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return emulated;
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}
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