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![qipeng.zha](/assets/img/avatar_default.png)
Update kerneldoc formatting per Documentation/kernel-dec-nano-HOWTO.txt. Signed-off-by: qipeng.zha <qipeng.zha@intel.com> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
780 lines
18 KiB
C
780 lines
18 KiB
C
/*
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* intel_pmc_ipc.c: Driver for the Intel PMC IPC mechanism
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*
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* (C) Copyright 2014-2015 Intel Corporation
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*
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* This driver is based on Intel SCU IPC driver(intel_scu_opc.c) by
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* Sreedhara DS <sreedhara.ds@intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*
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* PMC running in ARC processor communicates with other entity running in IA
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* core through IPC mechanism which in turn messaging between IA core ad PMC.
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/pm.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/pm_qos.h>
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#include <linux/kernel.h>
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#include <linux/bitops.h>
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#include <linux/sched.h>
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#include <linux/atomic.h>
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#include <linux/notifier.h>
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#include <linux/suspend.h>
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#include <linux/acpi.h>
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#include <asm/intel_pmc_ipc.h>
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#include <linux/mfd/lpc_ich.h>
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/*
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* IPC registers
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* The IA write to IPC_CMD command register triggers an interrupt to the ARC,
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* The ARC handles the interrupt and services it, writing optional data to
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* the IPC1 registers, updates the IPC_STS response register with the status.
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*/
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#define IPC_CMD 0x0
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#define IPC_CMD_MSI 0x100
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#define IPC_CMD_SIZE 16
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#define IPC_CMD_SUBCMD 12
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#define IPC_STATUS 0x04
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#define IPC_STATUS_IRQ 0x4
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#define IPC_STATUS_ERR 0x2
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#define IPC_STATUS_BUSY 0x1
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#define IPC_SPTR 0x08
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#define IPC_DPTR 0x0C
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#define IPC_WRITE_BUFFER 0x80
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#define IPC_READ_BUFFER 0x90
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/*
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* 16-byte buffer for sending data associated with IPC command.
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*/
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#define IPC_DATA_BUFFER_SIZE 16
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#define IPC_LOOP_CNT 3000000
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#define IPC_MAX_SEC 3
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#define IPC_TRIGGER_MODE_IRQ true
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/* exported resources from IFWI */
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#define PLAT_RESOURCE_IPC_INDEX 0
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#define PLAT_RESOURCE_IPC_SIZE 0x1000
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#define PLAT_RESOURCE_GCR_SIZE 0x1000
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#define PLAT_RESOURCE_PUNIT_DATA_INDEX 1
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#define PLAT_RESOURCE_PUNIT_INTER_INDEX 2
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#define PLAT_RESOURCE_ACPI_IO_INDEX 0
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/*
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* BIOS does not create an ACPI device for each PMC function,
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* but exports multiple resources from one ACPI device(IPC) for
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* multiple functions. This driver is responsible to create a
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* platform device and to export resources for those functions.
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*/
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#define TCO_DEVICE_NAME "iTCO_wdt"
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#define SMI_EN_OFFSET 0x30
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#define SMI_EN_SIZE 4
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#define TCO_BASE_OFFSET 0x60
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#define TCO_REGS_SIZE 16
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#define PUNIT_DEVICE_NAME "intel_punit_ipc"
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static const int iTCO_version = 3;
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static struct intel_pmc_ipc_dev {
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struct device *dev;
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void __iomem *ipc_base;
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bool irq_mode;
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int irq;
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int cmd;
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struct completion cmd_complete;
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/* The following PMC BARs share the same ACPI device with the IPC */
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resource_size_t acpi_io_base;
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int acpi_io_size;
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struct platform_device *tco_dev;
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/* gcr */
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resource_size_t gcr_base;
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int gcr_size;
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/* punit */
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resource_size_t punit_base;
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int punit_size;
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resource_size_t punit_base2;
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int punit_size2;
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struct platform_device *punit_dev;
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} ipcdev;
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static char *ipc_err_sources[] = {
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[IPC_ERR_NONE] =
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"no error",
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[IPC_ERR_CMD_NOT_SUPPORTED] =
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"command not supported",
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[IPC_ERR_CMD_NOT_SERVICED] =
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"command not serviced",
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[IPC_ERR_UNABLE_TO_SERVICE] =
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"unable to service",
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[IPC_ERR_CMD_INVALID] =
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"command invalid",
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[IPC_ERR_CMD_FAILED] =
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"command failed",
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[IPC_ERR_EMSECURITY] =
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"Invalid Battery",
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[IPC_ERR_UNSIGNEDKERNEL] =
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"Unsigned kernel",
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};
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/* Prevent concurrent calls to the PMC */
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static DEFINE_MUTEX(ipclock);
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static inline void ipc_send_command(u32 cmd)
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{
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ipcdev.cmd = cmd;
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if (ipcdev.irq_mode) {
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reinit_completion(&ipcdev.cmd_complete);
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cmd |= IPC_CMD_MSI;
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}
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writel(cmd, ipcdev.ipc_base + IPC_CMD);
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}
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static inline u32 ipc_read_status(void)
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{
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return readl(ipcdev.ipc_base + IPC_STATUS);
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}
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static inline void ipc_data_writel(u32 data, u32 offset)
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{
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writel(data, ipcdev.ipc_base + IPC_WRITE_BUFFER + offset);
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}
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static inline u8 ipc_data_readb(u32 offset)
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{
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return readb(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
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}
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static inline u32 ipc_data_readl(u32 offset)
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{
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return readl(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
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}
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static int intel_pmc_ipc_check_status(void)
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{
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int status;
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int ret = 0;
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if (ipcdev.irq_mode) {
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if (0 == wait_for_completion_timeout(
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&ipcdev.cmd_complete, IPC_MAX_SEC * HZ))
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ret = -ETIMEDOUT;
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} else {
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int loop_count = IPC_LOOP_CNT;
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while ((ipc_read_status() & IPC_STATUS_BUSY) && --loop_count)
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udelay(1);
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if (loop_count == 0)
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ret = -ETIMEDOUT;
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}
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status = ipc_read_status();
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if (ret == -ETIMEDOUT) {
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dev_err(ipcdev.dev,
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"IPC timed out, TS=0x%x, CMD=0x%x\n",
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status, ipcdev.cmd);
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return ret;
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}
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if (status & IPC_STATUS_ERR) {
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int i;
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ret = -EIO;
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i = (status >> IPC_CMD_SIZE) & 0xFF;
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if (i < ARRAY_SIZE(ipc_err_sources))
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dev_err(ipcdev.dev,
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"IPC failed: %s, STS=0x%x, CMD=0x%x\n",
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ipc_err_sources[i], status, ipcdev.cmd);
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else
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dev_err(ipcdev.dev,
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"IPC failed: unknown, STS=0x%x, CMD=0x%x\n",
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status, ipcdev.cmd);
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if ((i == IPC_ERR_UNSIGNEDKERNEL) || (i == IPC_ERR_EMSECURITY))
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ret = -EACCES;
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}
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return ret;
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}
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/**
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* intel_pmc_ipc_simple_command() - Simple IPC command
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* @cmd: IPC command code.
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* @sub: IPC command sub type.
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*
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* Send a simple IPC command to PMC when don't need to specify
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* input/output data and source/dest pointers.
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*
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* Return: an IPC error code or 0 on success.
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*/
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int intel_pmc_ipc_simple_command(int cmd, int sub)
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{
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int ret;
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mutex_lock(&ipclock);
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if (ipcdev.dev == NULL) {
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mutex_unlock(&ipclock);
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return -ENODEV;
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}
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ipc_send_command(sub << IPC_CMD_SUBCMD | cmd);
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ret = intel_pmc_ipc_check_status();
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mutex_unlock(&ipclock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(intel_pmc_ipc_simple_command);
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/**
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* intel_pmc_ipc_raw_cmd() - IPC command with data and pointers
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* @cmd: IPC command code.
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* @sub: IPC command sub type.
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* @in: input data of this IPC command.
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* @inlen: input data length in bytes.
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* @out: output data of this IPC command.
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* @outlen: output data length in dwords.
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* @sptr: data writing to SPTR register.
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* @dptr: data writing to DPTR register.
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*
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* Send an IPC command to PMC with input/output data and source/dest pointers.
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*
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* Return: an IPC error code or 0 on success.
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*/
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int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen, u32 *out,
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u32 outlen, u32 dptr, u32 sptr)
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{
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u32 wbuf[4] = { 0 };
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int ret;
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int i;
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if (inlen > IPC_DATA_BUFFER_SIZE || outlen > IPC_DATA_BUFFER_SIZE / 4)
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return -EINVAL;
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mutex_lock(&ipclock);
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if (ipcdev.dev == NULL) {
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mutex_unlock(&ipclock);
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return -ENODEV;
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}
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memcpy(wbuf, in, inlen);
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writel(dptr, ipcdev.ipc_base + IPC_DPTR);
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writel(sptr, ipcdev.ipc_base + IPC_SPTR);
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/* The input data register is 32bit register and inlen is in Byte */
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for (i = 0; i < ((inlen + 3) / 4); i++)
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ipc_data_writel(wbuf[i], 4 * i);
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ipc_send_command((inlen << IPC_CMD_SIZE) |
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(sub << IPC_CMD_SUBCMD) | cmd);
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ret = intel_pmc_ipc_check_status();
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if (!ret) {
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/* out is read from 32bit register and outlen is in 32bit */
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for (i = 0; i < outlen; i++)
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*out++ = ipc_data_readl(4 * i);
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}
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mutex_unlock(&ipclock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(intel_pmc_ipc_raw_cmd);
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/**
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* intel_pmc_ipc_command() - IPC command with input/output data
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* @cmd: IPC command code.
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* @sub: IPC command sub type.
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* @in: input data of this IPC command.
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* @inlen: input data length in bytes.
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* @out: output data of this IPC command.
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* @outlen: output data length in dwords.
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*
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* Send an IPC command to PMC with input/output data.
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*
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* Return: an IPC error code or 0 on success.
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*/
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int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,
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u32 *out, u32 outlen)
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{
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return intel_pmc_ipc_raw_cmd(cmd, sub, in, inlen, out, outlen, 0, 0);
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}
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EXPORT_SYMBOL_GPL(intel_pmc_ipc_command);
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static irqreturn_t ioc(int irq, void *dev_id)
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{
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int status;
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if (ipcdev.irq_mode) {
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status = ipc_read_status();
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writel(status | IPC_STATUS_IRQ, ipcdev.ipc_base + IPC_STATUS);
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}
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complete(&ipcdev.cmd_complete);
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return IRQ_HANDLED;
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}
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static int ipc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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resource_size_t pci_resource;
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int ret;
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int len;
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ipcdev.dev = &pci_dev_get(pdev)->dev;
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ipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ;
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ret = pci_enable_device(pdev);
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if (ret)
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return ret;
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ret = pci_request_regions(pdev, "intel_pmc_ipc");
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if (ret)
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return ret;
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pci_resource = pci_resource_start(pdev, 0);
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len = pci_resource_len(pdev, 0);
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if (!pci_resource || !len) {
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dev_err(&pdev->dev, "Failed to get resource\n");
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return -ENOMEM;
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}
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init_completion(&ipcdev.cmd_complete);
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if (request_irq(pdev->irq, ioc, 0, "intel_pmc_ipc", &ipcdev)) {
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dev_err(&pdev->dev, "Failed to request irq\n");
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return -EBUSY;
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}
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ipcdev.ipc_base = ioremap_nocache(pci_resource, len);
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if (!ipcdev.ipc_base) {
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dev_err(&pdev->dev, "Failed to ioremap ipc base\n");
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free_irq(pdev->irq, &ipcdev);
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ret = -ENOMEM;
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}
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return ret;
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}
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static void ipc_pci_remove(struct pci_dev *pdev)
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{
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free_irq(pdev->irq, &ipcdev);
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pci_release_regions(pdev);
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pci_dev_put(pdev);
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iounmap(ipcdev.ipc_base);
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ipcdev.dev = NULL;
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}
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static const struct pci_device_id ipc_pci_ids[] = {
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{PCI_VDEVICE(INTEL, 0x0a94), 0},
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{PCI_VDEVICE(INTEL, 0x1a94), 0},
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{ 0,}
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};
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MODULE_DEVICE_TABLE(pci, ipc_pci_ids);
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static struct pci_driver ipc_pci_driver = {
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.name = "intel_pmc_ipc",
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.id_table = ipc_pci_ids,
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.probe = ipc_pci_probe,
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.remove = ipc_pci_remove,
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};
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static ssize_t intel_pmc_ipc_simple_cmd_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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int subcmd;
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int cmd;
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int ret;
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ret = sscanf(buf, "%d %d", &cmd, &subcmd);
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if (ret != 2) {
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dev_err(dev, "Error args\n");
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return -EINVAL;
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}
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ret = intel_pmc_ipc_simple_command(cmd, subcmd);
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if (ret) {
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dev_err(dev, "command %d error with %d\n", cmd, ret);
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return ret;
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}
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return (ssize_t)count;
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}
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static ssize_t intel_pmc_ipc_northpeak_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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unsigned long val;
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int subcmd;
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int ret;
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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if (val)
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subcmd = 1;
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else
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subcmd = 0;
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ret = intel_pmc_ipc_simple_command(PMC_IPC_NORTHPEAK_CTRL, subcmd);
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if (ret) {
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dev_err(dev, "command north %d error with %d\n", subcmd, ret);
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return ret;
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}
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return (ssize_t)count;
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}
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static DEVICE_ATTR(simplecmd, S_IWUSR,
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NULL, intel_pmc_ipc_simple_cmd_store);
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static DEVICE_ATTR(northpeak, S_IWUSR,
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NULL, intel_pmc_ipc_northpeak_store);
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static struct attribute *intel_ipc_attrs[] = {
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&dev_attr_northpeak.attr,
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&dev_attr_simplecmd.attr,
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NULL
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};
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static const struct attribute_group intel_ipc_group = {
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.attrs = intel_ipc_attrs,
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};
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#define PUNIT_RESOURCE_INTER 1
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static struct resource punit_res[] = {
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/* Punit */
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{
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.flags = IORESOURCE_MEM,
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},
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{
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.flags = IORESOURCE_MEM,
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},
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};
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#define TCO_RESOURCE_ACPI_IO 0
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#define TCO_RESOURCE_SMI_EN_IO 1
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#define TCO_RESOURCE_GCR_MEM 2
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static struct resource tco_res[] = {
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/* ACPI - TCO */
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{
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.flags = IORESOURCE_IO,
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},
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/* ACPI - SMI */
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{
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.flags = IORESOURCE_IO,
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},
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/* GCS */
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{
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.flags = IORESOURCE_MEM,
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},
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};
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static struct lpc_ich_info tco_info = {
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.name = "Apollo Lake SoC",
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.iTCO_version = 3,
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};
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static int ipc_create_punit_device(void)
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{
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struct platform_device *pdev;
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struct resource *res;
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int ret;
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pdev = platform_device_alloc(PUNIT_DEVICE_NAME, -1);
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if (!pdev) {
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dev_err(ipcdev.dev, "Failed to alloc punit platform device\n");
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return -ENOMEM;
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}
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pdev->dev.parent = ipcdev.dev;
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res = punit_res;
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res->start = ipcdev.punit_base;
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res->end = res->start + ipcdev.punit_size - 1;
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res = punit_res + PUNIT_RESOURCE_INTER;
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res->start = ipcdev.punit_base2;
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res->end = res->start + ipcdev.punit_size2 - 1;
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ret = platform_device_add_resources(pdev, punit_res,
|
|
ARRAY_SIZE(punit_res));
|
|
if (ret) {
|
|
dev_err(ipcdev.dev, "Failed to add platform punit resources\n");
|
|
goto err;
|
|
}
|
|
|
|
ret = platform_device_add(pdev);
|
|
if (ret) {
|
|
dev_err(ipcdev.dev, "Failed to add punit platform device\n");
|
|
goto err;
|
|
}
|
|
ipcdev.punit_dev = pdev;
|
|
|
|
return 0;
|
|
err:
|
|
platform_device_put(pdev);
|
|
return ret;
|
|
}
|
|
|
|
static int ipc_create_tco_device(void)
|
|
{
|
|
struct platform_device *pdev;
|
|
struct resource *res;
|
|
int ret;
|
|
|
|
pdev = platform_device_alloc(TCO_DEVICE_NAME, -1);
|
|
if (!pdev) {
|
|
dev_err(ipcdev.dev, "Failed to alloc tco platform device\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
pdev->dev.parent = ipcdev.dev;
|
|
|
|
res = tco_res + TCO_RESOURCE_ACPI_IO;
|
|
res->start = ipcdev.acpi_io_base + TCO_BASE_OFFSET;
|
|
res->end = res->start + TCO_REGS_SIZE - 1;
|
|
|
|
res = tco_res + TCO_RESOURCE_SMI_EN_IO;
|
|
res->start = ipcdev.acpi_io_base + SMI_EN_OFFSET;
|
|
res->end = res->start + SMI_EN_SIZE - 1;
|
|
|
|
res = tco_res + TCO_RESOURCE_GCR_MEM;
|
|
res->start = ipcdev.gcr_base;
|
|
res->end = res->start + ipcdev.gcr_size - 1;
|
|
|
|
ret = platform_device_add_resources(pdev, tco_res, ARRAY_SIZE(tco_res));
|
|
if (ret) {
|
|
dev_err(ipcdev.dev, "Failed to add tco platform resources\n");
|
|
goto err;
|
|
}
|
|
|
|
ret = platform_device_add_data(pdev, &tco_info,
|
|
sizeof(struct lpc_ich_info));
|
|
if (ret) {
|
|
dev_err(ipcdev.dev, "Failed to add tco platform data\n");
|
|
goto err;
|
|
}
|
|
|
|
ret = platform_device_add(pdev);
|
|
if (ret) {
|
|
dev_err(ipcdev.dev, "Failed to add tco platform device\n");
|
|
goto err;
|
|
}
|
|
ipcdev.tco_dev = pdev;
|
|
|
|
return 0;
|
|
err:
|
|
platform_device_put(pdev);
|
|
return ret;
|
|
}
|
|
|
|
static int ipc_create_pmc_devices(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = ipc_create_tco_device();
|
|
if (ret) {
|
|
dev_err(ipcdev.dev, "Failed to add tco platform device\n");
|
|
return ret;
|
|
}
|
|
ret = ipc_create_punit_device();
|
|
if (ret) {
|
|
dev_err(ipcdev.dev, "Failed to add punit platform device\n");
|
|
platform_device_unregister(ipcdev.tco_dev);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static int ipc_plat_get_res(struct platform_device *pdev)
|
|
{
|
|
struct resource *res;
|
|
void __iomem *addr;
|
|
int size;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_IO,
|
|
PLAT_RESOURCE_ACPI_IO_INDEX);
|
|
if (!res) {
|
|
dev_err(&pdev->dev, "Failed to get io resource\n");
|
|
return -ENXIO;
|
|
}
|
|
size = resource_size(res);
|
|
ipcdev.acpi_io_base = res->start;
|
|
ipcdev.acpi_io_size = size;
|
|
dev_info(&pdev->dev, "io res: %llx %x\n",
|
|
(long long)res->start, (int)resource_size(res));
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM,
|
|
PLAT_RESOURCE_PUNIT_DATA_INDEX);
|
|
if (!res) {
|
|
dev_err(&pdev->dev, "Failed to get punit resource\n");
|
|
return -ENXIO;
|
|
}
|
|
size = resource_size(res);
|
|
ipcdev.punit_base = res->start;
|
|
ipcdev.punit_size = size;
|
|
dev_info(&pdev->dev, "punit data res: %llx %x\n",
|
|
(long long)res->start, (int)resource_size(res));
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM,
|
|
PLAT_RESOURCE_PUNIT_INTER_INDEX);
|
|
if (!res) {
|
|
dev_err(&pdev->dev, "Failed to get punit inter resource\n");
|
|
return -ENXIO;
|
|
}
|
|
size = resource_size(res);
|
|
ipcdev.punit_base2 = res->start;
|
|
ipcdev.punit_size2 = size;
|
|
dev_info(&pdev->dev, "punit interface res: %llx %x\n",
|
|
(long long)res->start, (int)resource_size(res));
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM,
|
|
PLAT_RESOURCE_IPC_INDEX);
|
|
if (!res) {
|
|
dev_err(&pdev->dev, "Failed to get ipc resource\n");
|
|
return -ENXIO;
|
|
}
|
|
size = PLAT_RESOURCE_IPC_SIZE;
|
|
if (!request_mem_region(res->start, size, pdev->name)) {
|
|
dev_err(&pdev->dev, "Failed to request ipc resource\n");
|
|
return -EBUSY;
|
|
}
|
|
addr = ioremap_nocache(res->start, size);
|
|
if (!addr) {
|
|
dev_err(&pdev->dev, "I/O memory remapping failed\n");
|
|
release_mem_region(res->start, size);
|
|
return -ENOMEM;
|
|
}
|
|
ipcdev.ipc_base = addr;
|
|
|
|
ipcdev.gcr_base = res->start + size;
|
|
ipcdev.gcr_size = PLAT_RESOURCE_GCR_SIZE;
|
|
dev_info(&pdev->dev, "ipc res: %llx %x\n",
|
|
(long long)res->start, (int)resource_size(res));
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_ACPI
|
|
static const struct acpi_device_id ipc_acpi_ids[] = {
|
|
{ "INT34D2", 0},
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(acpi, ipc_acpi_ids);
|
|
#endif
|
|
|
|
static int ipc_plat_probe(struct platform_device *pdev)
|
|
{
|
|
struct resource *res;
|
|
int ret;
|
|
|
|
ipcdev.dev = &pdev->dev;
|
|
ipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ;
|
|
init_completion(&ipcdev.cmd_complete);
|
|
|
|
ipcdev.irq = platform_get_irq(pdev, 0);
|
|
if (ipcdev.irq < 0) {
|
|
dev_err(&pdev->dev, "Failed to get irq\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = ipc_plat_get_res(pdev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to request resource\n");
|
|
return ret;
|
|
}
|
|
|
|
ret = ipc_create_pmc_devices();
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to create pmc devices\n");
|
|
goto err_device;
|
|
}
|
|
|
|
if (request_irq(ipcdev.irq, ioc, 0, "intel_pmc_ipc", &ipcdev)) {
|
|
dev_err(&pdev->dev, "Failed to request irq\n");
|
|
ret = -EBUSY;
|
|
goto err_irq;
|
|
}
|
|
|
|
ret = sysfs_create_group(&pdev->dev.kobj, &intel_ipc_group);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to create sysfs group %d\n",
|
|
ret);
|
|
goto err_sys;
|
|
}
|
|
|
|
return 0;
|
|
err_sys:
|
|
free_irq(ipcdev.irq, &ipcdev);
|
|
err_irq:
|
|
platform_device_unregister(ipcdev.tco_dev);
|
|
platform_device_unregister(ipcdev.punit_dev);
|
|
err_device:
|
|
iounmap(ipcdev.ipc_base);
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM,
|
|
PLAT_RESOURCE_IPC_INDEX);
|
|
if (res)
|
|
release_mem_region(res->start, PLAT_RESOURCE_IPC_SIZE);
|
|
return ret;
|
|
}
|
|
|
|
static int ipc_plat_remove(struct platform_device *pdev)
|
|
{
|
|
struct resource *res;
|
|
|
|
sysfs_remove_group(&pdev->dev.kobj, &intel_ipc_group);
|
|
free_irq(ipcdev.irq, &ipcdev);
|
|
platform_device_unregister(ipcdev.tco_dev);
|
|
platform_device_unregister(ipcdev.punit_dev);
|
|
iounmap(ipcdev.ipc_base);
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM,
|
|
PLAT_RESOURCE_IPC_INDEX);
|
|
if (res)
|
|
release_mem_region(res->start, PLAT_RESOURCE_IPC_SIZE);
|
|
ipcdev.dev = NULL;
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver ipc_plat_driver = {
|
|
.remove = ipc_plat_remove,
|
|
.probe = ipc_plat_probe,
|
|
.driver = {
|
|
.name = "pmc-ipc-plat",
|
|
.acpi_match_table = ACPI_PTR(ipc_acpi_ids),
|
|
},
|
|
};
|
|
|
|
static int __init intel_pmc_ipc_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = platform_driver_register(&ipc_plat_driver);
|
|
if (ret) {
|
|
pr_err("Failed to register PMC ipc platform driver\n");
|
|
return ret;
|
|
}
|
|
ret = pci_register_driver(&ipc_pci_driver);
|
|
if (ret) {
|
|
pr_err("Failed to register PMC ipc pci driver\n");
|
|
platform_driver_unregister(&ipc_plat_driver);
|
|
return ret;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static void __exit intel_pmc_ipc_exit(void)
|
|
{
|
|
pci_unregister_driver(&ipc_pci_driver);
|
|
platform_driver_unregister(&ipc_plat_driver);
|
|
}
|
|
|
|
MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>");
|
|
MODULE_DESCRIPTION("Intel PMC IPC driver");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
/* Some modules are dependent on this, so init earlier */
|
|
fs_initcall(intel_pmc_ipc_init);
|
|
module_exit(intel_pmc_ipc_exit);
|