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![Russell King](/assets/img/avatar_default.png)
arch/arm/mach-pnx4008/include/mach/gpio.h:214: error: implicit declaration of function 'IO_ADDRESS' Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
329 lines
7.4 KiB
C
329 lines
7.4 KiB
C
/*
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* arch/arm/mach-pnx4008/gpio.c
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*
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* PNX4008 GPIO driver
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*
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* Author: Dmitry Chigirev <source@mvista.com>
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*
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* Based on reference code by Iwo Mergler and Z.Tabaaloute from Philips:
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* Copyright (c) 2005 Koninklijke Philips Electronics N.V.
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*
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* 2005 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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#include <mach/gpio.h>
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/* register definitions */
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#define PIO_VA_BASE IO_ADDRESS(PNX4008_PIO_BASE)
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#define PIO_INP_STATE (0x00U)
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#define PIO_OUTP_SET (0x04U)
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#define PIO_OUTP_CLR (0x08U)
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#define PIO_OUTP_STATE (0x0CU)
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#define PIO_DRV_SET (0x10U)
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#define PIO_DRV_CLR (0x14U)
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#define PIO_DRV_STATE (0x18U)
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#define PIO_SDINP_STATE (0x1CU)
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#define PIO_SDOUTP_SET (0x20U)
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#define PIO_SDOUTP_CLR (0x24U)
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#define PIO_MUX_SET (0x28U)
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#define PIO_MUX_CLR (0x2CU)
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#define PIO_MUX_STATE (0x30U)
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static inline void gpio_lock(void)
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{
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local_irq_disable();
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}
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static inline void gpio_unlock(void)
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{
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local_irq_enable();
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}
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/* Inline functions */
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static inline int gpio_read_bit(u32 reg, int gpio)
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{
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u32 bit, val;
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int ret = -EFAULT;
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if (gpio < 0)
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goto out;
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bit = GPIO_BIT(gpio);
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if (bit) {
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val = __raw_readl(PIO_VA_BASE + reg);
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ret = (val & bit) ? 1 : 0;
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}
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out:
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return ret;
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}
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static inline int gpio_set_bit(u32 reg, int gpio)
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{
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u32 bit, val;
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int ret = -EFAULT;
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if (gpio < 0)
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goto out;
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bit = GPIO_BIT(gpio);
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if (bit) {
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val = __raw_readl(PIO_VA_BASE + reg);
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val |= bit;
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__raw_writel(val, PIO_VA_BASE + reg);
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ret = 0;
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}
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out:
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return ret;
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}
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/* Very simple access control, bitmap for allocated/free */
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static unsigned long access_map[4];
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#define INP_INDEX 0
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#define OUTP_INDEX 1
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#define GPIO_INDEX 2
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#define MUX_INDEX 3
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/*GPIO to Input Mapping */
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static short gpio_to_inp_map[32] = {
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, 10, 11, 12, 13, 14, 24, -1
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};
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/*GPIO to Mux Mapping */
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static short gpio_to_mux_map[32] = {
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, 0, 1, 4, 5, -1
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};
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/*Output to Mux Mapping */
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static short outp_to_mux_map[32] = {
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-1, -1, -1, 6, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, 2, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1
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};
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int pnx4008_gpio_register_pin(unsigned short pin)
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{
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unsigned long bit = GPIO_BIT(pin);
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int ret = -EBUSY; /* Already in use */
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gpio_lock();
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if (GPIO_ISBID(pin)) {
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if (access_map[GPIO_INDEX] & bit)
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goto out;
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access_map[GPIO_INDEX] |= bit;
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} else if (GPIO_ISRAM(pin)) {
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if (access_map[GPIO_INDEX] & bit)
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goto out;
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access_map[GPIO_INDEX] |= bit;
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} else if (GPIO_ISMUX(pin)) {
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if (access_map[MUX_INDEX] & bit)
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goto out;
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access_map[MUX_INDEX] |= bit;
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} else if (GPIO_ISOUT(pin)) {
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if (access_map[OUTP_INDEX] & bit)
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goto out;
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access_map[OUTP_INDEX] |= bit;
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} else if (GPIO_ISIN(pin)) {
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if (access_map[INP_INDEX] & bit)
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goto out;
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access_map[INP_INDEX] |= bit;
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} else
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goto out;
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ret = 0;
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out:
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gpio_unlock();
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return ret;
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}
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EXPORT_SYMBOL(pnx4008_gpio_register_pin);
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int pnx4008_gpio_unregister_pin(unsigned short pin)
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{
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unsigned long bit = GPIO_BIT(pin);
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int ret = -EFAULT; /* Not registered */
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gpio_lock();
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if (GPIO_ISBID(pin)) {
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if (~access_map[GPIO_INDEX] & bit)
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goto out;
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access_map[GPIO_INDEX] &= ~bit;
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} else if (GPIO_ISRAM(pin)) {
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if (~access_map[GPIO_INDEX] & bit)
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goto out;
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access_map[GPIO_INDEX] &= ~bit;
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} else if (GPIO_ISMUX(pin)) {
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if (~access_map[MUX_INDEX] & bit)
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goto out;
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access_map[MUX_INDEX] &= ~bit;
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} else if (GPIO_ISOUT(pin)) {
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if (~access_map[OUTP_INDEX] & bit)
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goto out;
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access_map[OUTP_INDEX] &= ~bit;
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} else if (GPIO_ISIN(pin)) {
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if (~access_map[INP_INDEX] & bit)
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goto out;
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access_map[INP_INDEX] &= ~bit;
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} else
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goto out;
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ret = 0;
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out:
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gpio_unlock();
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return ret;
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}
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EXPORT_SYMBOL(pnx4008_gpio_unregister_pin);
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unsigned long pnx4008_gpio_read_pin(unsigned short pin)
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{
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unsigned long ret = -EFAULT;
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int gpio = GPIO_BIT_MASK(pin);
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gpio_lock();
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if (GPIO_ISOUT(pin)) {
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ret = gpio_read_bit(PIO_OUTP_STATE, gpio);
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} else if (GPIO_ISRAM(pin)) {
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if (gpio_read_bit(PIO_DRV_STATE, gpio) == 0) {
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ret = gpio_read_bit(PIO_SDINP_STATE, gpio);
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}
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} else if (GPIO_ISBID(pin)) {
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ret = gpio_read_bit(PIO_DRV_STATE, gpio);
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if (ret > 0)
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ret = gpio_read_bit(PIO_OUTP_STATE, gpio);
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else if (ret == 0)
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ret =
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gpio_read_bit(PIO_INP_STATE, gpio_to_inp_map[gpio]);
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} else if (GPIO_ISIN(pin)) {
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ret = gpio_read_bit(PIO_INP_STATE, gpio);
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}
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gpio_unlock();
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return ret;
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}
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EXPORT_SYMBOL(pnx4008_gpio_read_pin);
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/* Write Value to output */
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int pnx4008_gpio_write_pin(unsigned short pin, int output)
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{
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int gpio = GPIO_BIT_MASK(pin);
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int ret = -EFAULT;
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gpio_lock();
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if (GPIO_ISOUT(pin)) {
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printk( "writing '%x' to '%x'\n",
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gpio, output ? PIO_OUTP_SET : PIO_OUTP_CLR );
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ret = gpio_set_bit(output ? PIO_OUTP_SET : PIO_OUTP_CLR, gpio);
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} else if (GPIO_ISRAM(pin)) {
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if (gpio_read_bit(PIO_DRV_STATE, gpio) > 0)
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ret = gpio_set_bit(output ? PIO_SDOUTP_SET :
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PIO_SDOUTP_CLR, gpio);
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} else if (GPIO_ISBID(pin)) {
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if (gpio_read_bit(PIO_DRV_STATE, gpio) > 0)
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ret = gpio_set_bit(output ? PIO_OUTP_SET :
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PIO_OUTP_CLR, gpio);
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}
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gpio_unlock();
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return ret;
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}
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EXPORT_SYMBOL(pnx4008_gpio_write_pin);
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/* Value = 1 : Set GPIO pin as output */
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/* Value = 0 : Set GPIO pin as input */
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int pnx4008_gpio_set_pin_direction(unsigned short pin, int output)
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{
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int gpio = GPIO_BIT_MASK(pin);
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int ret = -EFAULT;
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gpio_lock();
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if (GPIO_ISBID(pin) || GPIO_ISRAM(pin)) {
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ret = gpio_set_bit(output ? PIO_DRV_SET : PIO_DRV_CLR, gpio);
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}
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gpio_unlock();
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return ret;
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}
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EXPORT_SYMBOL(pnx4008_gpio_set_pin_direction);
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/* Read GPIO pin direction: 0= pin used as input, 1= pin used as output*/
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int pnx4008_gpio_read_pin_direction(unsigned short pin)
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{
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int gpio = GPIO_BIT_MASK(pin);
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int ret = -EFAULT;
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gpio_lock();
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if (GPIO_ISBID(pin) || GPIO_ISRAM(pin)) {
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ret = gpio_read_bit(PIO_DRV_STATE, gpio);
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}
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gpio_unlock();
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return ret;
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}
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EXPORT_SYMBOL(pnx4008_gpio_read_pin_direction);
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/* Value = 1 : Set pin to muxed function */
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/* Value = 0 : Set pin as GPIO */
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int pnx4008_gpio_set_pin_mux(unsigned short pin, int output)
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{
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int gpio = GPIO_BIT_MASK(pin);
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int ret = -EFAULT;
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gpio_lock();
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if (GPIO_ISBID(pin)) {
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ret =
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gpio_set_bit(output ? PIO_MUX_SET : PIO_MUX_CLR,
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gpio_to_mux_map[gpio]);
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} else if (GPIO_ISOUT(pin)) {
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ret =
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gpio_set_bit(output ? PIO_MUX_SET : PIO_MUX_CLR,
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outp_to_mux_map[gpio]);
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} else if (GPIO_ISMUX(pin)) {
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ret = gpio_set_bit(output ? PIO_MUX_SET : PIO_MUX_CLR, gpio);
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}
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gpio_unlock();
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return ret;
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}
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EXPORT_SYMBOL(pnx4008_gpio_set_pin_mux);
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/* Read pin mux function: 0= pin used as GPIO, 1= pin used for muxed function*/
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int pnx4008_gpio_read_pin_mux(unsigned short pin)
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{
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int gpio = GPIO_BIT_MASK(pin);
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int ret = -EFAULT;
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gpio_lock();
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if (GPIO_ISBID(pin)) {
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ret = gpio_read_bit(PIO_MUX_STATE, gpio_to_mux_map[gpio]);
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} else if (GPIO_ISOUT(pin)) {
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ret = gpio_read_bit(PIO_MUX_STATE, outp_to_mux_map[gpio]);
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} else if (GPIO_ISMUX(pin)) {
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ret = gpio_read_bit(PIO_MUX_STATE, gpio);
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}
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gpio_unlock();
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return ret;
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}
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EXPORT_SYMBOL(pnx4008_gpio_read_pin_mux);
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